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Chip packages having dual DMOS devices with power management integrated circuits

  • US 8,809,951 B2
  • Filed: 09/23/2013
  • Issued: 08/19/2014
  • Est. Priority Date: 12/26/2008
  • Status: Active Grant
First Claim
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1. A semiconductor chip comprising:

  • a semiconductor substrate;

    a first double-diffused metal oxide semiconductor (DMOS) device on the semiconductor substrate;

    a second DMOS device on the semiconductor substrate;

    a capacitor coupled to the semiconductor substrate; and

    an inductor coupled to the semiconductor substrate, the inductor including a first terminal coupled to the first and second DMOS devices, and a second terminal coupled to the capacitor.

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