Chip packages having dual DMOS devices with power management integrated circuits
First Claim
Patent Images
1. A semiconductor chip comprising:
- a semiconductor substrate;
a first double-diffused metal oxide semiconductor (DMOS) device on the semiconductor substrate;
a second DMOS device on the semiconductor substrate;
a capacitor coupled to the semiconductor substrate; and
an inductor coupled to the semiconductor substrate, the inductor including a first terminal coupled to the first and second DMOS devices, and a second terminal coupled to the capacitor.
3 Assignments
0 Petitions
Accused Products
Abstract
Chip packages having power management integrated circuits are described. Power management integrated circuits can be combined with on-chip passive devices, and can provide voltage regulation, voltage conversion, dynamic voltage scaling, and battery management or charging. The on-chip passive devices can include inductors, capacitors, or resistors. Power management using a built-in voltage regulator or converter can provide for immediate adjustment of the voltage range to that which is needed. This improvement allows for easier control of electrical devices of different working voltages and decreases response time of electrical devices. Related fabrication techniques are described.
-
Citations
24 Claims
-
1. A semiconductor chip comprising:
-
a semiconductor substrate; a first double-diffused metal oxide semiconductor (DMOS) device on the semiconductor substrate; a second DMOS device on the semiconductor substrate; a capacitor coupled to the semiconductor substrate; and an inductor coupled to the semiconductor substrate, the inductor including a first terminal coupled to the first and second DMOS devices, and a second terminal coupled to the capacitor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
-
9. A semiconductor chip comprising:
-
a semiconductor substrate; a first double-diffused metal oxide semiconductor (DMOS) device on the semiconductor substrate; a second DMOS device on the semiconductor substrate; a first capacitor coupled to the semiconductor substrate; an inductor coupled to the semiconductor substrate, wherein the inductor includes a first terminal coupled to a first terminal of the first DMOS device and to a first terminal of the second DMOS device, and a second terminal of the inductor is coupled to the first capacitor; a switch controller coupled to a gate of the first DMOS device and to a gate of the second DMOS device; and a voltage feedback device having a first terminal coupled to the second terminal of the inductor and to the first capacitor and a second terminal coupled to the switch controller. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
-
-
17. A semiconductor chip comprising:
-
a semiconductor substrate; an inductor coupled to the semiconductor substrate; a first capacitor coupled to the semiconductor substrate; a first double-diffused metal oxide semiconductor (DMOS) device on the semiconductor substrate, the first DMOS device being coupled to a first terminal of the inductor; a second DMOS device on the semiconductor substrate, the second DMOS device including; a gate coupled to the first terminal of the inductor and to the first DMOS device, a first terminal coupled to the first terminal of the inductor, the first DMOS device and to the gate of the second DMOS device, and a second terminal coupled to the first capacitor; a switch controller coupled to a gate of the first DMOS device; and a voltage feedback device having; a first terminal coupled to the second terminal of the second DMOS device and to the first capacitor, and a second terminal coupled to the switch controller. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
-
Specification