Front side implanted guard ring structure for backside

• US 8,810,700 B2
• Filed: 08/20/2013
• Issued: 08/19/2014
• Est. Priority Date: 02/24/2009
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Wang, Wen-De, Yaung, Dun-Nian, Liu, Jen-Cheng, Chuang, Chun-Chieh, Lin, Jeng-Shyan
• Primary Examiner(s): Haskins, Twyler
• Assistant Examiner(s): Chon, Peter
• Application Number:
  US13/971,242
• Publication Number:
  US 20130334645A1
• Time in Patent Office: 364 Days
• Field of Search: 348/241, 348/272, 348/294, 348/307, 348/308, 257/126, 257/127, 257/140, 257/170, 257/171, 257/243, 257/244, 257/499, 257/501, 257/506, 257/508, 257/509, 257/510
• US Class Current: 348/294
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 27/14698 Post-treatment for the devices, e.g. annealing, impurity-gettering, shor-circuit elimination, recrystallisation
• CPC Class Codes: H01L 31/02005 for device characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

A method of forming a backside illuminated image sensor includes forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure. The method further includes forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure. The method further includes reducing a thickness of the semiconductor substrate until the guard ring structure is co-planar with a back-side surface of the semiconductor substrate.

Claims

1. A method of forming a backside illuminated image sensor, the method comprising:

forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure;

forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure; and

reducing a thickness of the semiconductor substrate until the guard ring structure is co-planar with a back-side surface of the semiconductor substrate.

2. The method of claim 1, further comprising removing damage from the semiconductor substrate following forming the guard ring structure.

3. The method of claim 1, further comprising doping the semiconductor substrate prior to forming the guard ring structure.

4. The method of claim 1, further comprising epitaxially growing a p-doped layer over the substrate, wherein forming the guard ring structure comprises forming the guard ring structure at least partially in the p-doped layer.

5. The method of claim 1, wherein forming the at least one image sensing element comprises forming at least one of a photodiode, a phototransistor, a complementary metal-oxide-semiconductor (CMOS) image sensor or a charged coupled device (CCD) sensor.

6. The method of claim 5, further comprising forming at least one second image sensing element, wherein the at least one second image sensing element is a different type of image sensing element from the at least one image sensing element.

7. The method of claim 1, further comprising forming a multi-layer interconnect (MLI) structure on the front-side surface of the semiconductor substrate prior to reducing the thickness of the semiconductor substrate.

8. The method of claim 7, wherein forming the MLI structure comprises routing the MLI structure above the guard ring structure and avoiding a pixel area of the two-dimensional array of pixels.

9. The method of claim 7, wherein forming the MLI structure comprises routing the MLI structure in a position to reflect incident light back toward a pixel area of the two-dimensional array of pixels.

10. The method of claim 1, wherein reducing the thickness of the semiconductor substrate comprises:

grinding the back-side surface of the semiconductor substrate; and

wet etching the ground back-side surface of the semiconductor substrate.

11. A method of forming a backside illuminated image sensor, the method comprising:

forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure;

forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure;

determining a thickness difference between a thickness of the semiconductor substrate and the predetermined depth; and

reducing a thickness of the semiconductor substrate to remove an entirety of the determined thickness difference.

12. An image sensor, comprising:

a semiconductor substrate, the substrate having a front-side surface and a back-side surface opposite the front-side surface;

a plurality of image sensing elements formed on the front-side surface of the substrate; and

a guard ring structure separating each of the image sensing elements from other image sensing elements, wherein the guard ring structure is co-planar with the back-side surface of the substrate.

13. The image sensor of claim 12, further comprising an application specific integrated circuit (ASIC) in an area of the semiconductor substrate separated from the plurality of image sensing elements.

14. The image sensor of claim 13, wherein the ASIC is formed in a doped well and a depth of the guard ring structure is greater than a depth of the doped well.

15. The image sensor of claim 12, further comprising a multi-layer interconnect (MLI) structure over the front-side surface of the semiconductor substrate, wherein interconnect elements of the MLI structure are positioned above the guard ring structure, the interconnect elements expose at least a portion of each image sensing element of the plurality of image sensing elements.

16. The image sensor of claim 12, further comprising a multi-layer interconnect (MLI) structure over the front-side surface of the semiconductor substrate, wherein interconnect elements of the MLI structure are positioned to reflect incident light back toward an image sensing element of the plurality of image sensing elements.

17. The image sensor of claim 12, wherein each image sensing element of the plurality of image sensing element comprises at least one of a photodiode, a phototransistor, a complementary metal-oxide-semiconductor (CMOS) image sensor or a charged coupled device (CCD) sensor.

18. The image sensor of claim 12, wherein a first image sensing element of the plurality of image sensing element is a different type of image sensing element from a second image sensing element of the plurality of image sensing elements.

19. The image sensor of claim 12, wherein the guard ring structure comprises at least one of boron, aluminum or gallium.

20. The image sensor of claim 12, wherein the guard ring structure comprises at least one of antimony, phosphorous or arsenic.