Digitally controlled jitter injection for built in self-testing (BIST)
First Claim
Patent Images
1. An apparatus, comprising:
- a transceiver circuit comprising;
a transmitter circuit configured to transmit a signal;
a receiver circuit configured to receive the signal;
a generator configured to generate a composite jitter including a plurality of multi-tone jitter components; and
a processor operable to digitally inject the composite jitter into the receiver circuit and/or the transmitter circuit of the transceiver circuit for testing a jitter tolerance associated with the transceiver circuit based on the signal and the injected composite jitter.
1 Assignment
0 Petitions
Accused Products
Abstract
A digitally controlled jitter injection apparatus for built in self-testing includes a transceiver circuit having a transmitter circuit and a receiver circuit. The digitally controlled jitter injection apparatus also includes a generator that generates a composite jitter including multi-tone jitter components. The digitally controlled jitter injection apparatus also includes a processor operable to digitally inject the composite jitter into a receiver circuit and/or a transmitter circuit of the transceiver circuit.
-
Citations
20 Claims
-
1. An apparatus, comprising:
a transceiver circuit comprising; a transmitter circuit configured to transmit a signal; a receiver circuit configured to receive the signal; a generator configured to generate a composite jitter including a plurality of multi-tone jitter components; and a processor operable to digitally inject the composite jitter into the receiver circuit and/or the transmitter circuit of the transceiver circuit for testing a jitter tolerance associated with the transceiver circuit based on the signal and the injected composite jitter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
-
9. A method of self-testing a transceiver circuit, comprising:
-
transmitting a signal by a transmitter circuit of the transceiver circuit; receiving the signal by a receiver circuit of the transceiver circuit; generating a composite jitter including a plurality of multi-tone jitter components; digitally injecting the composite jitter into the receiver circuit and/or the transmitter circuit of the transceiver circuit; and testing a jitter tolerance associated with the transceiver circuit based on the signal and the injected composite jitter. - View Dependent Claims (10, 11, 12)
-
-
13. A transceiver circuit, comprising:
-
means for transmitting a signal; means for receiving the signal; means for generating a composite jitter including a plurality of multi-tone jitter components; and means for digitally injecting the composite jitter into the means for receiving and/or means for transmitting of the transceiver circuit for testing a jitter tolerance associated with the transceiver circuit based on the signal and the injected composite jitter. - View Dependent Claims (14, 15, 16, 17)
-
-
18. A computer program product for self-testing a transceiver circuit, comprising:
a computer-readable medium having non-transitory program code recorded thereon, the program code comprising; program code to transmit a signal by a transmitter circuit of the transceiver circuit; program code to receive the signal by a receiver circuit of the transceiver circuit; program code to generate a composite jitter including a plurality of multi-tone jitter components; and program code to digitally inject the composite jitter into the receiver circuit and/or the transmitter circuit of the transceiver circuit for testing a jitter tolerance associated with the transceiver circuit based on the signal and the injected composite jitter. - View Dependent Claims (19, 20)
Specification