DC-DC converter semiconductor die structure

• US 8,811,920 B2
• Filed: 11/02/2011
• Issued: 08/19/2014
• Est. Priority Date: 04/20/2010
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Deuchars, Robert, Berchtold, Jean-Christophe, Colles, Joseph Hubert, Zimlich, David, Levesque, Chris, Southcombe, William David, Jones, David E., Yoder, Scott, Stockert, Terry J.
• Primary Examiner(s): Nguyen, Lee
• Application Number:
  US13/287,713
• Publication Number:
  US 20120280746A1
• Time in Patent Office: 1,021 Days
• Field of Search: 455/127.1, 455/333, 257/299, 363/123
• US Class Current: 455/127.1
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 2200/171 A filter circuit coupled to the output of an amplifier
• CPC Class Codes: H03F 2200/222 A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
• CPC Class Codes: H03F 2200/27 A biasing circuit node being switched in an amplifier circuit
• CPC Class Codes: H03F 2200/318 A matching circuit being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/411 the output amplifying stage of an amplifier comprising two power stages
• CPC Class Codes: H03F 2200/414 A switch being coupled in the output circuit of an amplifier to switch the output on/off
• CPC Class Codes: H03F 2200/417 A switch coupled in the output circuit of an amplifier being controlled by a circuit
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier
• CPC Class Codes: H03F 2200/534 Transformer coupled at the input of an amplifier
• CPC Class Codes: H03F 2200/537 A transformer being used as coupling element between two amplifying stages
• CPC Class Codes: H03F 2200/541 Transformer coupled at the output of an amplifier
• CPC Class Codes: H03F 2203/21106 An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• CPC Class Codes: H03F 2203/21142 Output signals of a plurality of power amplifiers are parallel combined to a common output
• CPC Class Codes: H03F 2203/21157 A filter circuit being added at the output of a power amplifier stage
• CPC Class Codes: H03F 3/195 : in integrated circuits
• CPC Class Codes: H03F 3/211 : using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 : with semiconductor devices only
• CPC Class Codes: H03F 3/602 : Combinations of several amplifiers
• CPC Class Codes: H03F 3/72 : Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

A direct current (DC)-DC converter having a DC-DC converter semiconductor die and an alpha flying capacitive element is disclosed. The DC-DC converter semiconductor die includes a first series alpha switching element, a second series alpha switching element, a first alpha flying capacitor connection node, which is about over the second series alpha switching element, and a second alpha flying capacitor connection node, which is about over the first series alpha switching element. The alpha flying capacitive element is electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node. By locating the first alpha flying capacitor connection node and the second alpha flying capacitor connection node about over the second series alpha switching element and the first series alpha switching element, respectively, lengths of transient current paths may be minimized, thereby reducing noise and potential interference.

Claims

1. Circuitry comprising:

a direct current (DC)-DC converter semiconductor die comprising;

a first layer including;

a first series alpha switching element; and

a second series alpha switching element;

a second layer over the first layer and including;

a first alpha flying capacitor connection node, which is vertically aligned with the second series alpha switching element; and

a second alpha flying capacitor connection node, which is vertically aligned with the first series alpha switching element; and

an alpha flying capacitive element electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node.

2. The circuitry of claim 1 wherein:

a first terminal of the first series alpha switching element is electrically coupled to the second alpha flying capacitor connection node; and

a first terminal of the second series alpha switching element is electrically coupled to the first alpha flying capacitor connection node.

3. The circuitry of claim 1 further comprising a supporting structure wherein the DC-DC converter semiconductor die and the alpha flying capacitive element are attached to the supporting structure.

4. The circuitry of claim 1 wherein:

the DC-DC converter semiconductor die further has a first row, a second row, and a third row;

the DC-DC converter semiconductor die further has a first end;

the first row is adjacent to the first end;

the second row is adjacent to the first row;

the third row is adjacent to the second row;

the first row has a first alpha end and a first beta end;

the second row has a second alpha end and a second beta end;

the third row has a third alpha end and a third beta end;

the second alpha end is adjacent to the first alpha end;

the third alpha end is adjacent to the second alpha end;

the second beta end is adjacent to the first beta end;

the third beta end is adjacent to the second beta end;

the first row has the first alpha flying capacitor connection node, a first beta flying capacitor connection node, an alpha inductive element connection node, and a beta inductive element connection node;

the first alpha flying capacitor connection node is adjacent to the first alpha end;

the alpha inductive element connection node is adjacent to the first alpha flying capacitor connection node;

the beta inductive element connection node is adjacent to the alpha inductive element connection node;

the first beta flying capacitor connection node is adjacent to the beta inductive element connection node;

the first beta flying capacitor connection node is adjacent to the first beta end;

the second row has an alpha decoupling connection node, an alpha ground connection node, a beta ground connection node, and a beta decoupling connection node;

the alpha decoupling connection node is adjacent to the second alpha end;

the alpha ground connection node is adjacent to the alpha decoupling connection node;

the beta ground connection node is adjacent to the alpha ground connection node;

the beta decoupling connection node is adjacent to the beta ground connection node;

the beta decoupling connection node is adjacent to the second beta end;

the third row has the second alpha flying capacitor connection node and a second beta flying capacitor connection node;

the second alpha flying capacitor connection node is adjacent to the third alpha end; and

the second beta flying capacitor connection node is adjacent to the third beta end.

5. The circuitry of claim 4 wherein:

the first row has a first row centerline;

the second row has a second row centerline;

the third row has a third row centerline;

the first row and the second row are separated by a centerline spacing;

the third row and the second row are separated by the centerline spacing;

the first alpha flying capacitor connection node and the alpha inductive element connection node are separated by the centerline spacing;

the beta inductive element connection node and the alpha inductive element connection node are separated by the centerline spacing; and

the first beta flying capacitor connection node and the beta inductive element connection node are separated by the centerline spacing.

6. The circuitry of claim 5 wherein the centerline spacing is equal to about 400 micrometers.

7. The circuitry of claim 1 further comprising:

a first radio frequency (RF) power amplifier (PA) comprising;

a first non-quadrature PA path having a first single-ended output; and

a first quadrature PA path coupled between the first non-quadrature PA path and an antenna port, such that the first quadrature PA path has a first single-ended input, which is coupled to the first single-ended output; and

a second RF PA comprising a second quadrature PA path coupled to the antenna port,

wherein the antenna port is configured to be coupled to an antenna.

8. The circuitry of claim 1 further comprising:

a first multi-mode multi-band quadrature radio frequency (RF) power amplifier (PA) coupled to multi-mode multi-band alpha switching circuitry via a single alpha PA output; and

the multi-mode multi-band alpha switching circuitry having;

a first alpha non-linear mode output associated with a first non-linear mode RF communications band; and

a plurality of alpha linear mode outputs, such that each of the plurality of alpha linear mode outputs is associated with a corresponding one of a first plurality of linear mode RF communications bands.

9. The circuitry of claim 1 further comprising:

a first radio frequency (RF) power amplifier (PA) comprising a first final stage having a first final bias input, such that bias of the first final stage is via the first final bias input;

PA control circuitry;

a PA-digital communications interface (DCI) coupled between a digital communications bus and the PA control circuitry; and

a final stage current digital-to-analog converter (IDAC) coupled between the PA control circuitry and the first final bias input.

10. The circuitry of claim 1 further comprising:

a first radio frequency (RF) power amplifier (PA) having a first final stage and adapted to;

receive and amplify a first RF input signal to provide a first RF output signal; and

receive a first final bias signal to bias the first final stage;

PA bias circuitry adapted to receive a bias power supply signal and provide the first final bias signal based on the bias power supply signal; and

a DC-DC converter comprising the DC-DC converter semiconductor die and adapted to receive a DC power supply signal from a DC power supply and provide the bias power supply signal based on the DC power supply signal, such that a voltage of the bias power supply signal is greater than a voltage of the DC power supply signal.

11. The circuitry of claim 1 further comprising:

a DC-DC converter comprising;

the DC-DC converter semiconductor die;

a power amplifier (PA) envelope power supply comprising a charge pump buck converter coupled to radio frequency (RF) PA circuitry; and

a PA bias power supply comprising a charge pump coupled to the RF PA circuitry; and

the RF PA circuitry.

12. The circuitry of claim 1 further comprising:

multi-mode multi-band radio frequency (RF) power amplification circuitry having at least a first RF input and a plurality of RF outputs, such that;

configuration of the multi-mode multi-band RF power amplification circuitry associates one of the at least the first RF input with one of the plurality of RF outputs; and

the configuration is associated with at least a first look-up table (LUT);

power amplifier (PA) control circuitry coupled between the multi-mode multi-band RF power amplification circuitry and a PA-digital communications interface (DCI), such that the PA control circuitry has at least the first LUT, which is associated with at least a first defined parameter set; and

the PA-DCI, which is coupled to a digital communications bus.

13. Circuitry comprising:

a direct current (DC)-DC converter semiconductor die comprising;

a first series alpha switching element;

a second series alpha switching element;

a first alpha flying capacitor connection node about over the second series alpha switching element;

a second alpha flying capacitor connection node about over the first series alpha switching element;

a first alpha charging switching element adjacent to the first series alpha switching element; and

a second alpha charging switching element between the first series alpha switching element and the second series alpha switching element; and

an alpha flying capacitive element electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node.

14. The circuitry of claim 13 wherein the DC-DC converter semiconductor die further comprises an alpha decoupling connection node about over the second alpha charging switching element.

15. The circuitry of claim 14 further comprising an alpha decoupling capacitive element, such that a first end of the alpha decoupling capacitive element is electrically coupled to the alpha decoupling connection node.

16. The circuitry of claim 15 wherein the alpha decoupling capacitive element is adjacent to the alpha flying capacitive element.

17. The circuitry of claim 15 wherein the alpha decoupling capacitive element is adjacent to the DC-DC converter semiconductor die.

18. The circuitry of claim 15 wherein the first end of the alpha decoupling capacitive element is electrically coupled to a DC power supply.

19. The circuitry of claim 15 wherein a second end of the alpha decoupling capacitive element is electrically coupled to a ground.

20. Circuitry comprising:

a direct current (DC)-DC converter semiconductor die comprising;

a first series alpha switching element;

a second series alpha switching element;

a first alpha flying capacitor connection node about over the second series alpha switching element;

a second alpha flying capacitor connection node about over the first alpha switching element;

a first series beta switching element;

a second series beta switching element;

a first beta flying capacitor connection node about over the second series beta switching element; and

a second beta flying capacitor connection node about over the first series beta switching element;

an alpha flying capacitive element electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node.

21. The circuitry of claim 20 further comprising a beta flying capacitive element coupled between the first beta flying capacitor connection node and the second beta flying capacitor connection node.

22. The circuitry of claim 20 wherein:

a first terminal of the first series beta switching element is electrically coupled to the second beta flying capacitor connection node; and

a first terminal of the second series beta switching element is electrically coupled to the first beta flying capacitor connection node.

23. The circuitry of claim 20 wherein the DC-DC converter semiconductor die further comprises:

a first beta charging switching element adjacent to the first series beta switching element; and

a second beta charging switching element between the first series beta switching element and the second series beta switching element.

24. The circuitry of claim 23 wherein the DC-DC converter semiconductor die further comprises a beta decoupling connection node about over the second beta charging switching element.

25. A method comprising:

providing a direct current (DC)-DC converter semiconductor die comprising;

a first layer including;

a first series alpha switching element; and

a second series alpha switching element;

a second layer over the first layer and including;

a first alpha flying capacitor connection node, which is vertically aligned with the second series alpha switching element; and

a second alpha flying capacitor connection node, which is vertically aligned with the first series alpha switching element; and

providing an alpha flying capacitive element electrically coupled between the first alpha flying capacitor connection node and the second alpha flying capacitor connection node.