Data processing device and method

• US 8,812,820 B2
• Filed: 02/19/2009
• Issued: 08/19/2014
• Est. Priority Date: 08/28/2003
• Status: Active Grant

• Current Assignee: Scientia Sol Mentis AG (PACT XPP Schweiz AG)
• Original Assignee: Pact XPP Technologies, AG
• Inventors: Vorbach, Martin, Thomas, Alexander
• Primary Examiner(s): Coleman, Eric
• Application Number:
  US12/389,274
• Publication Number:
  US 20090172351A1
• Time in Patent Office: 2,007 Days
• Field of Search: 712/18, 712 10- 22
• US Class Current: 712/15
• CPC Class Codes: G06F 15/173 using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
• CPC Class Codes: G06F 15/17343 wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture reconfigurable processors arrays G06F15/7867
• CPC Class Codes: G06F 15/17381 Two dimensional, e.g. mesh, torus
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06F 15/8023 Two dimensional arrays, e.g. mesh, torus
• CPC Class Codes: G06F 15/803 Three-dimensional arrays or hypercubes
• CPC Class Codes: G06F 9/3885 using a plurality of independent parallel functional units
• CPC Class Codes: G06F 9/3897 with adaptable data path
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A data processing device comprising a multidimensional array of coarse grained logic elements processing data and operating at a first clock rate and communicating with one another and/or other elements via busses and/or communication lines operated at a second clock rate is disclosed, wherein the first clock rate is higher than the second and wherein the coarse grained logic elements comprise storage means for storing data needed to be processed.

Claims

1. A configurable data processing device comprising:

an array of configurable cells; and

a global configurable network interconnecting the configurable cells for transferring data globally including the transfer of data between configurable cells;

wherein;

each of at least some of the configurable cells is configurable in function and comprises a data processing unit that includes a multiplier, a shifter, at least two input registers and at least one output register; and

for each of a number of pairs of adjacent ones of the at least some of the configurable cells, in addition to the global configurable network interconnection, a next neighbor connection is provided between the adjacent cells of the pair, allowing for a direct next neighbor data transfer between the adjacent cells of the pair and bypassing the global configurable network.

2. The configurable data processing device according to claim 1, wherein the next neighbor connection is a direct connection from a cell output to a cell input of an adjacent cell without a connection to the global configurable network.

3. The configurable data processing device according to claim 2, wherein the adjacent cells connected via the next neighbor connection are two configurable cells a first configurable cell physically disposed in direct contact with a second configurable cell.

11. The configurable data processing device according to claim 1, wherein the direct next neighbor data transfer is from an arithmetic logic unit (ALU) of a first cell of the pair to a second cell of the pair without the data being transferred through any register downstream of the ALU.

4. A configurable data processing device comprising:

an array of configurable cells; and

a global configurable network interconnecting the configurable cells for transferring data globally including the transfer of data between configurable cells;

wherein;

each of at least some of the configurable cells is configurable in function and comprises a data processing unit that includes a multiplier, a shifter, at least two input registers and at least one output register;

for each of a number of pairs of adjacent ones of the at least some of the configurable cells, in addition to the global configurable interconnection, a next neighbor connection is provided between the adjacent cells of the pair, allowing for a direct next neighbor data transfer between the adjacent cells of the pair; and

bypassing the global configurable network and

the data processing device is adapted for chaining of registers of multiple cells in order to update constants of the cells in the chain by propagating data from one cell in the chain to a next cell in the chain.

5. The configurable data processing device according to claim 4, wherein Finite Impulse Response (FIR) filter constants are updated.

10. The configurable data processing device according to claim 4, wherein the next neighbor connection is a direct connection from a cell output to a cell input of an adjacent cell without a connection to the global configurable network.

6. A configurable data processing device comprising:

an array of configurable cells; and

a global configurable network interconnecting the configurable cells for transferring data globally including the transfer of data between configurable cells;

wherein;

each of at least some of the configurable cells is configurable in function and comprises a data processing unit that includes a multiplier, a shifter, at least two input registers and at least one output register;

for each of a number of pairs of adjacent ones of the at least some of the configurable cells, in addition to the global configurable interconnection, a next neighbor connection is provided between the adjacent cells of the pair, allowing for a direct next neighbor data transfer between the adjacent cells of the pair and bypassing the global configurable network; and

multiple cells are chained together via multiple ones of the next neighbor connections for updating constants of the cells in the chain by propagating, during an operation, data from one cell in the chain to a next cell in the chain, fast constant value updates being thereby performed at runtime in the configurable data processing device.

7. The configurable data processing device according to claim 6, wherein the next neighbor connection is a direct connection from a cell output to a cell input of an adjacent cell without a connection to the global configurable network.

8. The configurable data processing device according to claim 7, wherein the adjacent cells connected via the next neighbor connection are two configurable cells a first configurable cell physically disposed in direct contact with a second configurable cell.

9. The configurable data processing device according to any one of claims 6, 7, or 8, wherein Finite Impulse Response (FIR) filter constants are updated.

12. A configurable data processing device comprising:

an array of configurable cells; and

a global configurable network interconnecting the configurable cells for transferring data globally including the transfer of data between configurable cells;

wherein;

each of at least some of the configurable cells is configurable in function; and

for each of a number of pairs of adjacent ones of the at least some of the configurable cells, the global configurable network includes a respective register situated such that data is transferred from the respective cell on the global configurable network and bypassing the global configurable network.

13. The configurable data processing device according to claim 12, wherein the data transferred from the respective cell is output of an arithmetic logic unit (ALU) of the respective cell.