Programmable logic device with improved security
First Claim
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1. A logic device comprising:
- at least one logic block comprising a plurality of logic elements driven by a first clock signal;
a decryption core configured to process encrypted input data, the decryption core driven by a second clock signal, wherein;
the second clock signal is decoupled from and asynchronous to the first clock signal; and
the decryption core generates plaintext output data to configure the at least one logic block.
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Abstract
Techniques of the present invention impede power consumption measurements of an encryption engine on a logic device by running the encryption engine with an independent clock. This clock produces a signal that is decoupled from and asynchronous to clock signals feeding other circuits on the device. The clock feeding the encryption engine is not accessible externally to the device. Circuits may be employed to intentionally slow down or add jitter to one or more of the clock signals.
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Citations
20 Claims
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1. A logic device comprising:
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at least one logic block comprising a plurality of logic elements driven by a first clock signal; a decryption core configured to process encrypted input data, the decryption core driven by a second clock signal, wherein; the second clock signal is decoupled from and asynchronous to the first clock signal; and the decryption core generates plaintext output data to configure the at least one logic block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for encrypting data on a logic device, the method comprising:
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driving a plurality of logic elements of at least one logic block on the device with a first clock signal; generating a second clock signal decoupled from and asynchronous to the first clock signal; and driving an encryption engine located in the logic block with the second clock signal, the encryption engine processing input data from the plurality of logic elements and returning output data to the plurality of logic elements. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A non-transitory computer readable storage medium comprising instructions for configuring a logic device to
drive a plurality of logic elements of at least one logic block on the device with a first clock signal; -
generate a second clock signal decoupled from and asynchronous to the first clock signal; and drive an encryption engine located in the logic block with the second clock signal, the encryption engine processing input data from the plurality of logic elements and returning output data to the plurality of logic elements. - View Dependent Claims (18, 19, 20)
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Specification