Virtual self-destruction of stored information

• US 8,812,875 B1
• Filed: 04/12/2010
• Issued: 08/19/2014
• Est. Priority Date: 04/12/2010
• Status: Active Grant

• Current Assignee: Stephen Melvin
• Original Assignee: Stephen Melvin
• Inventors: Melvin, Stephen
• Primary Examiner(s): Barron, Jr., Gilberto
• Assistant Examiner(s): ALMEIDA, DEVIN E
• Application Number:
  US12/758,475
• Time in Patent Office: 1,590 Days
• Field of Search: None
• US Class Current: 713/193
• CPC Class Codes: G06F 21/602 Providing cryptographic facilities or services
• CPC Class Codes: G06F 21/6245 Protecting personal data, e.g. for financial or medical purposes
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00
• CPC Class Codes: G06F 21/88 Detecting or preventing theft or loss
• CPC Class Codes: G06F 2221/2143 Clearing memory, e.g. to prevent the data from being stolen
• CPC Class Codes: G06F 2221/2153 Using hardware token as a secondary aspect
• CPC Class Codes: H04L 9/0891 Revocation or update of secret information, e.g. encryption key update or rekeying
• CPC Class Codes: H04L 9/0897 involving additional devices, e.g. trusted platform module [TPM], smartcard or USB

Abstract

A method and apparatus are utilized to conveniently and swiftly render stored information inaccessible. Sensitive information is stored in an encrypted form and by eliminating the key or keys which are needed for decryption, the stored information becomes virtually destroyed. A variety of mechanisms and policies can be used to manage, set and eliminate decryption keys. In some cases decryption keys can be stored in volatile storage elements so that by merely interrupting power to the storage element, the decryption keys are eliminated. In this way, a manually controlled mechanism can be used to allow a user to accomplish a “self-destruct” of the stored information instantly without the need for the operation of any processor and without the need to change any stored information.

Claims

1. An apparatus comprising:

a storage device interface coupled to a storage device capable of storing information;

a host interface coupled to a host device, configured to accept a read command from said host device and configured to provide a response to said read command that includes data to said host device;

a decryption apparatus coupled to said host interface and said storage device interface used to decrypt data received by said storage device before being delivered to said host device;

a data pattern detection circuit responsive to data being transferred from said storage device, decrypted by said decryption apparatus and provided to said host device in response to said read command;

a storage circuit storing one or more decryption keys, wherein said one or more decryption keys can be used to decrypt information stored on said storage device;

a key elimination circuit configured to trigger said storage circuit thereby causing the elimination of one or more of said one or more decryption keys, wherein said key elimination circuit is responsive to said data pattern detection circuit.

2. The apparatus according to claim 1 further comprising:

an encryption apparatus coupled to said host interface and said storage device interface used to encrypt data received by said host device before being delivered to said storage device.

3. The apparatus according to claim 1 wherein said storage circuit can be detached from said host interface and said storage device interface.

4. The apparatus according to claim 1 wherein said storage circuit stores a plurality of decryption keys and wherein said key elimination circuit is configured to eliminate a single decryption key responsive to said data pattern detection circuit.

5. The apparatus according to claim 1 wherein said storage circuit comprises volatile memory and wherein said elimination of one or more of said one or more decryption keys comprises interrupting power to said volatile memory.