Shielded gate MOSFET device with a funnel-shaped trench
First Claim
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1. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
- a funnel-shaped trench having a flared rim etched in a semiconductor substrate,the flared rim having an upper edge at a wider cross section trench opening at about a top surface of the semiconductor substrate and having a lower edge at a top opening of a narrower cross section trench body portion that terminates in the semiconductor substrate;
a gate electrode disposed in the funnel-shaped trench on a gate dielectric layer formed on the flared rim, the gate electrode having a split structure with a first gate electrode portion being separated from a second gate electrode portion by an insulator material; and
a source region, a gate region, and a drain region disposed in the semiconductor substrate,the gate region abutting a lower portion of the flared rim, the drain region abutting a sidewall of the narrower cross section trench body portion with a top of the drain region being aligned with a lower edge of the gate electrode.
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Abstract
A MOSFET device has a funnel-shaped trench etched in a semiconductor substrate. The funnel-shaped trench has flared rim extending from a wider cross section trench mouth at the surface of the semiconductor substrate to a narrower cross section trench body portion which terminates in an epilayer portion of the semiconductor substrate. A gate electrode is disposed in the trench on the flared rim. Source and gate regions of the device abut upper and lower portions of the flared rim, respectively. A drain region of the device, which abuts the narrower cross section trench body portion, is self-aligned with a lower edge of a gate electrode.
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Citations
29 Claims
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1. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
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a funnel-shaped trench having a flared rim etched in a semiconductor substrate, the flared rim having an upper edge at a wider cross section trench opening at about a top surface of the semiconductor substrate and having a lower edge at a top opening of a narrower cross section trench body portion that terminates in the semiconductor substrate; a gate electrode disposed in the funnel-shaped trench on a gate dielectric layer formed on the flared rim, the gate electrode having a split structure with a first gate electrode portion being separated from a second gate electrode portion by an insulator material; and a source region, a gate region, and a drain region disposed in the semiconductor substrate, the gate region abutting a lower portion of the flared rim, the drain region abutting a sidewall of the narrower cross section trench body portion with a top of the drain region being aligned with a lower edge of the gate electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
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a funnel-shaped trench disposed in a semiconductor substrate, the funnel-shaped trench having a flared rim and having a trench body disposed below the flared rim, the flared rim having a sidewall with a first slope and the trench body having a sidewall with a second slope different from the first slope; a gate dielectric layer disposed in the trench on the flared rim; a gate electrode disposed on the gate dielectric layer; a source region abutting an upper portion of the flared rim; a gate region abutting a lower portion of the flared rim; and a drain region abutting a sidewall of the trench body, the drain region having a top aligned with a lower edge of the gate electrode. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25)
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26. A metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising:
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a trench in a semiconductor substrate, the trench having a flared rim, the flared rim extending down from a wider cross-section trench opening at about a top surface of the semiconductor substrate to a narrower cross-section trench body portion that terminates in the semiconductor substrate; a gate electrode disposed in the trench on the flared rim; a drain region in the semiconductor substrate, the drain region having a top aligned with about a lower edge of the gate electrode disposed in the trench on the flared rim; a gate region disposed in the semiconductor substrate above the drain region; and a source region disposed in the semiconductor substrate above the gate region, the source region including a dopant in a portion of the semiconductor substrate above a top edge of the gate electrode. - View Dependent Claims (27, 28, 29)
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Specification