Semiconductor apparatus, substrate design method, and substrate design apparatus

• US 8,816,510 B2
• Filed: 09/28/2009
• Issued: 08/26/2014
• Est. Priority Date: 09/30/2008
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Matsui, Noriyuki, Sakai, Hidehisa
• Primary Examiner(s): Parekh, Nitin
• Application Number:
  US12/567,893
• Publication Number:
  US 20100078810A1
• Time in Patent Office: 1,793 Days
• Field of Search: 257/774, 257/773, 257/786, 257/780, 257/E23.011
• US Class Current: 257/780
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

A semiconductor apparatus including: a substrate; and a semiconductor chip mounted on the substrate, wherein the substrate has plural holes, and the plural holes are provided such that the density on a substrate surface of the holes in a first area, which is an area of the substrate facing a semiconductor chip peripheral portion, is higher than the density on the substrate surface of the holes in an area excluding the first area on the substrate.

Claims

1. A semiconductor apparatus comprising:

a substrate comprising a plurality of holes formed in a mounting surface thereof; and

a semiconductor chip directly mounted on the mounting surface of the substrate, wherein

said mounting surface comprises a first portion and a second portion,

said plurality of holes comprises a first plurality of holes formed in the first portion and a second plurality of holes formed in the second portion,

the substrate includes a greater density of the first plurality of holes than density of the second plurality of holes, the density being defined based on an area ratio in the respective portions of the mounting surface,

the first portion is an area of a peripheral ring having a uniform width and having an outer perimeter defined by a solder ball boundary,

the uniform width is equal to a uniform pitch of solder balls forming the solder ball boundary in the peripheral ring, and

the second portion is a portion of the mounting surface that does not include the first portion of the substrate.

2. The semiconductor apparatus according to claim 1, wherein

the semiconductor chip comprises a plurality of signal terminals, and

the substrate has a first surface, which is the mounting surface on which the semiconductor chip is mounted and has plural first electrodes connected to the signal terminals, a second surface, which is the back surface of the first surface and has plural second electrodes connectable to an external substrate, and a plurality of wires that connect the first electrodes and the second electrodes through the plurality of holes.

3. The semiconductor apparatus according to claim 2, wherein, on the substrate, a first boundary, which is a boundary of the area facing the semiconductor chip, is a square.

4. The semiconductor apparatus according to claim 3, wherein the first portion is a portion which is inside of the first boundary and has a distance equal to or shorter than a predetermined first distance from the first boundary.

5. The semiconductor apparatus according to claim 4, wherein the first distance is a minimum distance between the second electrodes.

6. The semiconductor apparatus according to claim 4, wherein the holes in the first portion are provided at the positions at an equal distance from two, which are neighboring each other, of the second electrodes.

7. The semiconductor apparatus according to claim 4,

wherein said substrate further comprises a third portion, which is a portion of the substrate within the first portion and has a distance equal to or shorter than a predetermined second distance from two sides, which are neighboring each other,

said plurality of holes further comprises a third plurality of holes formed in the third portion,

and

the substrate includes a greater density of the third plurality of holes than density on the substrate surface of the holes provided in the portion excluding the third portion in the first portion.

8. The semiconductor apparatus according to claim 7, wherein the second distance is a minimum distance between the second electrodes.

9. The semiconductor apparatus according to claim 3, wherein the first portion is a portion between a second boundary, which is an innermost square of the squares formed by connecting the centers of the second electrodes outside of the first boundary and a third boundary, which is an outermost square of the squares formed by connecting the centers of the second electrodes inside of the first boundary.

10. The semiconductor apparatus according to claim 9, wherein the holes in the first portion are provided at the positions at an equal distance from four, which are neighboring each other, of the second electrodes.

11. The semiconductor apparatus according to claim 2, wherein the wires extend through the holes in the first portion.

12. The semiconductor apparatus according to claim 2, wherein the holes in the first portion extend between the first surface and the second surface.

13. The semiconductor apparatus according to claim 2, wherein:

the substrate is a multi-layered substrate; and

the holes in the first portion have openings of the holes on the first surface or the second surface.

14. The semiconductor apparatus according to claim 2, wherein the first portion is a portion within the substrate and has a distance equal to or shorter than a predetermined first distance from the first boundary.