Ad conversion circuit, semiconductor device, and ad conversion method

• US 8,816,888 B2
• Filed: 09/26/2013
• Issued: 08/26/2014
• Est. Priority Date: 10/04/2012
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Inventors: Kumakura, Yoshiaki
• Primary Examiner(s): JEANGLAUDE, JEAN BRUNER
• Application Number:
  US14/037,907
• Publication Number:
  US 20140097978A1
• Time in Patent Office: 334 Days
• Field of Search: 341/143, 341/122, 341/155
• US Class Current: 341/122
• CPC Class Codes: H03M 1/1245 Details of sampling arrangements or methods
• CPC Class Codes: H03M 1/462 Details of the control circuitry, e.g. of the successive approximation register
• CPC Class Codes: H03M 1/468 in which the input S/H circuit is merged with the feedback DAC array

Abstract

A reference voltage generator generates a reference voltage at the time of sampling a received input signal. A sampling time controller detects a change in the reference voltage. When the reference voltage rises to a determined threshold, the sampling time controller determines that sampling is completed, and generates a sampling clock in which sampling time is controlled on the basis of an external clock.

Claims

1. An AD conversion circuit comprising:

a reference voltage generator which generates a reference voltage at the time of sampling a received input signal; and

a sampling time controller which detects a change in the reference voltage, which determines at the time of the reference voltage rising to a determined threshold that sampling is completed, and which generates a sampling clock in which sampling time is controlled on the basis of an external clock.

2. The AD conversion circuit according to claim 1, wherein the determined threshold is smaller than a saturation value of the reference voltage.

3. The AD conversion circuit according to claim 1, wherein the sampling time controller makes a comparison between the reference voltage and the determined threshold every determined timing in a first clock cycle of the external clock, holds a number of times the comparison is made until the reference voltage rises to the determined threshold, and determines the sampling time in a second or later clock cycle of the external clock on the basis of the held number of times the comparison is made.

4. A semiconductor device comprising an AD conversion circuit, the AD conversion circuit including:

a reference voltage generator which generates a reference voltage at the time of sampling a received input signal; and

a sampling time controller which detects a change in the reference voltage, which determines at the time of the reference voltage rising to a determined threshold that sampling is completed, and which generates a sampling clock in which sampling time is controlled on the basis of an external clock.

5. The semiconductor device according to claim 4 further comprising a control circuit which gives the AD conversion circuit instructions, according to a duty ratio of the sampling clock generated by the sampling time controller, to switch AD conversion resolution.

6. The semiconductor device according to claim 4 further comprising:

an external clock generator which generates the external clock; and

a control circuit which gives the external clock generator instructions, according to a duty ratio of the sampling clock generated by the sampling time controller, to change a frequency of the external clock.

7. An AD conversion method comprising:

detecting a change in a reference voltage at the time of sampling a received input signal; and

determining at the time of the reference voltage rising to a determined threshold that sampling is completed, and generating a sampling clock in which sampling time is controlled on the basis of an external clock.