Image sensor with fixed potential output transistor

• US 8,817,154 B2
• Filed: 08/30/2012
• Issued: 08/26/2014
• Est. Priority Date: 08/30/2012
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Manabe, Sohei, Lyu, Jeong-Ho
• Primary Examiner(s): SELBY, GEVELL V
• Application Number:
  US13/599,343
• Publication Number:
  US 20140063304A1
• Time in Patent Office: 726 Days
• Field of Search: 348/308, 348/276, 348/292, 250/208.1
• US Class Current: 348/308
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H04N 25/53 Control of the integration time
• CPC Class Codes: H04N 25/531 by controlling rolling shutters in CMOS SSIS
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion

Abstract

An image sensor pixel includes a photosensitive region and pixel circuitry. The photosensitive region accumulates an image charge in response to light incident upon the image sensor. The pixel circuitry includes a transfer-storage transistor, a charge-storage area, an output transistor, and a floating diffusion region. The transfer-storage transistor is coupled between the photosensitive region and the charge-storage area. The output transistor has a channel coupled between the charge-storage area and the floating diffusion region and has a gate tied to a fixed voltage potential. The transfer-storage transistor causes the image charge to transfer from the photosensitive region to the charge-storage area and to transfer from the charge-storage area to the floating diffusion region.

Claims

1. An image sensor including a pixel array, the image sensor comprising:

a first photosensitive region of a first pixel disposed in or on a substrate layer to accumulate an image charge in response to light incident upon the first pixel; and

first pixel circuitry of the first pixel disposed in or on the substrate layer, the first pixel circuitry including;

a first transfer-storage transistor coupled between the first photosensitive region and a first charge-storage area to transfer the image charge from the first photosensitive region to the first charge-storage area; and

a first output transistor having a channel coupled between the first charge-storage area and a floating diffusion region to selectively transfer the image charge from the first charge-storage area to the floating diffusion region, wherein a gate of the first output transistor is coupled to a first fixed voltage potential and the image charge is selectively transferred from the first charge-storage area to the floating diffusion region in response to a control signal applied to a gate of the first transfer-storage transistor, wherein the first output transistor is a junction gate field-effect transistor.

2. The image sensor of claim 1, wherein the first pixel circuitry further includes:

a readout transistor having a gate coupled to the floating diffusion region to produce an image signal on a bit line indicative of the image charge at the floating diffusion region; and

a reset transistor coupled between a first voltage rail and the floating diffusion region to reset the first pixel.

3. The image sensor of claim 2, further comprising a second pixel disposed adjacent to the first pixel including:

a second photosensitive region; and

second pixel circuitry of the second pixel disposed in or on the substrate layer, the second pixel circuitry including;

a second transfer-storage transistor coupled between the second photosensitive region and a second charge-storage area; and

a second output transistor having a channel coupled between the second charge-storage area and the floating diffusion region, wherein a gate of the second output transistor is coupled to a second fixed voltage potential,

wherein the first and second pixel share the readout and reset transistors.

4. The image sensor of claim 3, further comprising:

a first global-shutter transistor coupled between a second voltage rail and the first photosensitive region to reset the first photosensitive region; and

a second global-shutter transistor coupled between the second voltage rail and the second photosensitive region to reset the second photosensitive region.

5. The image sensor of claim 4, wherein a gate of the first global-shutter transistor and a gate of the second global-shutter transistor are coupled to a global-shutter signal line to reset the first and second photosensitive regions simultaneously.

6. The image sensor of claim 3, wherein the gates of the first and second output transistors are coupled to the substrate layer to ground the gates of the first and second output transistors.

7. The image sensor of claim 3, further comprising a local interconnect that couples the first output transistor to the second output transistor, wherein the local interconnect is coupled to the floating diffusion region.

8. The image sensor of claim 7, further including a metal stack to route signals, wherein the metal stack includes:

a first metal layer comprised of conductors, wherein the majority of the conductors are substantially parallel to one another; and

a second metal layer comprised of conductors, wherein the majority of the conductors are both substantially parallel to one another within the second metal layer and substantially orthogonal to the majority of the conductors in the first metal layer,

wherein the local interconnect is disposed in the metal stack such that the local interconnect is substantially orthogonal to the majority of the conductors in the metal layer in which the local interconnect is disposed.

9. The image sensor of claim 3, the pixel array further comprising:

a first group of conductors that span the rows of the pixel array, including;

a first transfer-storage transistor gate signal line coupled to the first transfer-storage transistor;

a second transfer-storage transistor gate signal line coupled to the second transfer-storage transistor;

a reset signal line coupled to a gate of the reset transistor; and

the first voltage rail coupled to the gate of the reset transistor;

a second group of conductors that span the columns of the pixel array, including;

the bit line coupled to the readout transistor to send the image signal to readout circuitry;

a second voltage rail coupled to the readout transistor and coupled to a first global-shutter transistor and a second global-shutter transistor; and

a global-shutter signal line coupled to gates of the first and second global-shutter transistors to provide a photosensitive reset signal.

10. An image sensor including a pixel array, the image sensor comprising:

a first photosensitive region of a first pixel disposed in or on a substrate layer to accumulate an image charge in response to light incident upon the first pixel; and

first pixel circuitry of the first pixel disposed in or on the substrate layer, the first pixel circuitry including;

a first transfer-storage transistor coupled between the first photosensitive region and a first charge-storage area to transfer the image charge from the first photosensitive region to the first charge-storage area; and

a first output transistor having a channel coupled between the first charge-storage area and a floating diffusion region to selectively transfer the image charge from the first charge-storage area to the floating diffusion region, wherein a gate of the first output transistor is coupled to a first fixed voltage potential and the image charge is selectively transferred from the first charge-storage area to the floating diffusion region in response to a control signal applied to a gate of the first transfer-storage transistor,

wherein;

the first transfer-storage transistor is coupled to transfer the image charge from the first photosensitive region to the first charge-storage area in response to a first voltage level of the control signal,

the first transfer-storage transistor is coupled to store the image charge in the first charge-storage area in response to a second voltage level of the control signal,

the first transfer-storage transistor is coupled to transfer the image charge from the first charge-storage area to the floating diffusion region in response to a third voltage level of the control signal, and

the second voltage level is between the first and third voltage levels of the control signal.

11. A method of operating an image sensor, comprising:

accumulating a first image charge on a first photosensitive region of a first pixel in response to light incident upon the first photosensitive region;

transferring the first image charge from the first photosensitive region to a first charge-storage area by temporarily enabling a first transfer-storage transistor coupled between the first photosensitive region and the first charge-storage area;

storing the first image charge in the first charge-storage area;

temporarily enabling a first output transistor having a gate coupled to a first fixed voltage potential by applying a first control signal to a gate of the first transfer-storage transistor;

transferring the first image charge from the first charge-storage area to a floating diffusion region through the first output transistor while the first control signal is applied to the gate of the first transfer-storage transistor, wherein the first output transistor is coupled between the first charge-storage area and the floating diffusion region;

enabling the first transfer-storage transistor by applying a first voltage level of the first control signal to the first transfer-storage transistor;

storing the first image charge in the first charge-storage area by applying a second voltage level of the first control signal to the first transfer-storage transistor; and

enabling the first output transistor by applying a third voltage level of the first control signal to the first transfer-storage transistor,

wherein the second voltage level is between the first and third voltage levels.

12. The method of claim 11, further comprising:

producing a signal on a bit line indicative of the first image charge at the floating diffusion region; and

resetting the first pixel by temporarily enabling a reset transistor coupled between the floating diffusion region and a first voltage rail.

13. The method of claim 12, further comprising:

accumulating a second image charge on a second photosensitive region of a second pixel;

transferring the second image charge from the second photosensitive region to a second charge-storage area;

storing the second image charge in the second charge-storage area; and

temporarily enabling a second output transistor having a gate coupled to a second fixed voltage potential by applying a second control signal to a gate of the second transfer-storage transistor; and

transferring the second image charge from the second charge-storage area to a floating diffusion region through the second output transistor while the second control signal is applied to the gate of the second transfer-storage transistor, wherein the econd output transistor is coupled between the second charge-storage area and the floating diffusion region.

14. The method of claim 13, further comprising:

resetting the first photosensitive region by temporarily enabling a first global-shutter transistor coupled between a second voltage rail and the first photosensitive region; and

resetting the second photosensitive region by temporarily enabling a second global-shutter transistor coupled between the second voltage rail and the second photosensitive region.

15. The method of claim 14, further comprising resetting both the first photosensitive region and the second photosensitive region by applying a reset signal to both a gate of the first global-shutter transistor and a gate of the second global-shutter transistor simultaneously, wherein the gate of the first global-shutter transistor is coupled to the gate of the second global-shutter transistor.

16. The method of claim 13, wherein the gates of the first and second output transistor are coupled to a substrate layer to ground the gates of the first and second output transistors.

17. The method of claim 13, further comprising:

transferring the first image charge from the first charge-storage area to the floating diffusion region while a subsequent first image charge accumulates in the first photosensitive region; and

transferring the second image charge from the second charge-storage area to the floating diffusion region while a subsequent second image charge accumulates in the second photosensitive region.

18. An image sensor including a pixel array, the image sensor comprising:

a first photosensitive region of a first pixel disposed in or on a substrate layer to accumulate an image charge in response to light incident upon the first pixel;

first pixel circuitry of the first pixel disposed in or on the substrate layer, the first pixel circuitry including;

a first transfer-storage transistor coupled between the first photosensitive region and a first charge-storage area to transfer the image charge from the first photosensitive region to the first charge-storage area; and

a first output transistor having a channel coupled between the first charge-storage area and a floating diffusion region to selectively transfer the image charge from the first charge-storage area to the floating diffusion region, wherein a gate of the first output transistor is coupled to a first fixed voltage potential and the image charge is selectively transferred from the first charge-storage area to the floating diffusion region in response to a control signal applied to a gate of the first transfer-storage transistor;

a second pixel disposed adjacent to the first pixel including a second photosensitive region and second pixel circuitry of the second pixel disposed in or on the substrate layer, the second pixel circuitry including;

a second transfer-storage transistor coupled between the second photosensitive region and a second charge-storage area; and

a second output transistor having a channel coupled between the second charge-storage area and the floating diffusion region, wherein a gate of the second output transistor is coupled to a second fixed voltage potential, wherein the first and second pixel share the readout and reset transistors;

a local interconnect that couples the first output transistor to the second output transistor, wherein the local interconnect is coupled to the floating diffusion region; and

a metal stack to route signals, wherein the metal stack includes;

a first metal layer comprised of conductors, wherein the majority of the conductors are substantially parallel to one another; and

a second metal layer comprised of conductors, wherein the majority of the conductors are both substantially parallel to one another within the second metal layer and substantially orthogonal to the majority of the conductors in the first metal layer,

wherein the local interconnect is disposed in the metal stack such that the local interconnect is substantially orthogonal to the majority of the conductors in the metal layer in which the local interconnect is disposed.