Optical transceiver with vendor authentication

• US 8,819,423 B2
• Filed: 11/26/2008
• Issued: 08/26/2014
• Est. Priority Date: 11/27/2007
• Status: Active Grant

• Current Assignee: II-VI Delaware, Inc. (Coherent Corp.)
• Original Assignee: Finisar Corporation (II-VI Incorporated)
• Inventors: Ekkizogloy, Luke M., Dybsetter, Gerald L., Miao, Jason Y.
• Primary Examiner(s): Desrosiers, Evans
• Assistant Examiner(s): POTRATZ, DANIEL B
• Application Number:
  US12/323,731
• Publication Number:
  US 20090138709A1
• Time in Patent Office: 2,099 Days
• Field of Search: 713/168, 713/171, 713/189
• US Class Current: 713/168
• CPC Class Codes: G06F 21/00 Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]
• CPC Class Codes: G06F 21/44 Program or device authentication
• CPC Class Codes: H04B 10/40 Transceivers

Abstract

An optical receiver comprising at least one processor and a memory including at least one of an encryption key or a decryption key and at least one of encryption microcode or decryption microcode that includes processor-executable instructions that, when executed by the at least one processor, cause the optical transceiver to perform the following: an act of performing an encryption or decryption operation on data received from a host computing system to thereby authenticate the optical transceiver.

Claims

1. A method for allowing an optical transceiver to be authenticated by a host computing system, the method comprising:

receiving data from the host computing system at the optical transceiver communicatively coupled to the host computing system, wherein the optical transceiver includes a processor and a persistent memory having thereon encryption/decryption microcode written to the persistent memory, by an authorized vendor, after manufacture of the optical transceiver that, when executed, causes the optical transceiver to perform an encryption operation or a decryption operation, wherein the encryption/decryption microcode accesses an encryption key that is generated by the authorized vendor and stored separately from the encryption microcode on the persistent memory when performing the encryption operation;

writing the data to the persistent memory of the optical transceiver by the host computing system;

after the data is written to the persistent memory, encrypting the data using the encryption/decryption microcode and the encryption key;

storing the encrypted data on the persistent memory;

providing the encrypted data from the persistent memory to the host computing system for verifying that the optical transceiver is associated with the authorized vendor, wherein the verifying that the optical transceiver is associated with the authorized vendor includes the host computing system decrypting the encrypted data received from the persistent memory and the host computing system determining whether the decrypted data matches the data previously sent to the optical transceiver;

in response to the host computing system verifying that the optical transceiver is associated with the authorized vendor causing, by a control module of the optical transceiver, the optical transceiver to become fully operational; and

in response to the host computing system verifying that the optical transceiver is not associated with the authorized vendor disabling, by the control module, the optical transceiver.

2. The method in accordance with claim 1, wherein causing the optical transceiver to become fully operational includes enabling a high speed data link of the optical transceiver.

3. A method for allowing authentication between an optical transceiver and a host computing system, the method comprising:

receiving encrypted data from the host computing system at the optical transceiver communicatively coupled to the host computing system, the data being encrypted by the host computing system independent of data elements received from the optical transceiver, wherein the optical transceiver includes a processor and a persistent memory having thereon decryption microcode written to the persistent memory, by an authorized vendor, after manufacture of the optical transceiver that, when executed, causes the optical transceiver to perform a decryption operation, wherein the decryption microcode accesses a decryption key that is generated by the authorized vendor and stored on the optical transceiver when performing the decryption operation;

receiving unencrypted data from the host computing system at the optical transceiver;

writing the unencrypted data and the encrypted data to the persistent memory of the optical transceiver by the host computing system;

after the unencrypted data and the encrypted data are written to the persistent memory, decrypting the encrypted data using the decryption microcode and the decryption key at the optical transceiver;

determining if the decrypted data matches the unencrypted data, at the optical transceiver, in order to verify that the optical transceiver is associated with the authorized vendor;

in response to the optical transceiver determining that the decrypted data matches the unencrypted data, causing, by a control module of the optical transceiver, the optical transceiver to become fully operational; and

in response to the optical transceiver determining that the decrypted data does not match the unencrypted data, disabling, by the control module, the optical transceiver.

4. The method in accordance with claim 3, wherein the decryption microcode accesses the decryption key that is stored separately from the decryption microcode on the persistent memory when performing the decryption operation.

5. The method in accordance with claim 3, wherein the decryption microcode assesses the decryption key that is stored in system memory of the control module.

6. The method in accordance with claim 3, wherein a high speed data link of the optical transceiver is configured to not operate until the optical transceiver is fully operational.

7. The method in accordance with claim 3, wherein the unencrypted data is received separately from the host computing system at the optical transceiver.

8. The method in accordance with claim 3, wherein the unencrypted data is received at the same time as the encrypted data.

9. The method in accordance with claim 3, wherein the encrypted data is received from the host computing system via a two-wire 12C serial interface.

10. An optical transceiver comprising:

a control module;

at least one processor included in the control module;

a first memory separate from the at least one processor, the first memory including at least one of an encryption key or a decryption key, wherein the at least one of the encryption key or the decryption key is generated by an authorized vendor; and

a second memory separate from the at least one processor, the second memory including at least one of encryption microcode or decryption microcode, wherein the encryption microcode or the decryption microcode is written to the second memory, by the authorized vendor, after manufacture of the optical transceiver and the encryption microcode or the decryption microcode includes processor-executable instructions that, when executed by the at least one processor, cause the at least one processor to encrypt or decrypt data received from a host computing system, wherein

the control module is configured to;

allow the data received from the host computing system to be written to the first memory by the host computing system;

in response to the data being written to the first memory, encrypt or decrypt the data using the respective encryption or decryption microcode and the respective encryption key or decryption key;

in response to encrypting the data, send the encrypted data to the host computing system such that the host computing system can decrypt the encrypted data to determine if the decrypted data matches the data previously sent by the host computing system to the optical transceiver in order to verify that the optical transceiver is associated with the authorized vendor;

in response to decrypting the data, determine if the decrypted data matches unencrypted data previously received by the host computing system in order to verify that the optical transceiver is associated with the authorized vendor;

in response to verifying that the optical transceiver is associated with the authorized vendor, cause the optical transceiver to become fully operational; and

in response to verifying that the optical transceiver is not associated with the authorized vendor, disable the optical transceiver.

11. The optical transceiver in accordance with claim 10, wherein the processor-executable instructions cause the at least one processor to decrypt the data using decryption microcode and the decryption key;

and

to provide decrypted data to the host computing system for verification that the optical transceiver is authentic.

12. The optical transceiver in accordance with claim 10, wherein the second memory is a write-protected memory.

13. The optical transceiver in accordance with claim 10, wherein the first memory is system memory of the control module.