On chip inductor with frequency dependent inductance
First Claim
1. A semiconductor structure comprising:
- a first metal line embedded in a dielectric material layer located on a semiconductor substrate and resistively connected to a first device at a first end of said first metal line and resistively connected to a second device at a second end of said first metal line;
a second metal line embedded in said dielectric material layer and inductively coupled with said first metal line through a portion of said dielectric material layer; and
a capacitor having a first capacitor electrode and a second capacitor electrode, wherein said first capacitor electrode is resistively connected to an end of said second metal line, and wherein said second capacitor electrode is electrically grounded, wherein said first metal line includes a first sidewall and said second metal line includes a second sidewall, wherein said first and second sidewalls are substantially parallel to each other and abut said portion of said dielectric material layer and laterally separated from each other by a substantially constant spacing.
8 Assignments
0 Petitions
Accused Products
Abstract
A set of metal line structures including a signal transmission metal line and a capacitively-grounded inductively-signal-coupled metal line is embedded in a dielectric material layer. A capacitor is serially connected between the capacitively-grounded inductively-signal-coupled metal line and a local electrical ground, which may be on the input side or on the output side. The set of metal line structures and the capacitor collective provide a frequency dependent inductor. The Q factor of the frequency dependent inductor has multiple peaks that enable the operation of the frequency dependent inductor at multiple frequencies. Multiple capacitively-grounded inductively-signal-coupled metal lines may be provided in the frequency-dependent inductor, each of which is connected to the local electrical ground through a capacitor. By selecting different capacitance values for the capacitors, multiple values of the Q-factor may be obtained in the frequency dependent inductor at different signal frequencies.
-
Citations
20 Claims
-
1. A semiconductor structure comprising:
-
a first metal line embedded in a dielectric material layer located on a semiconductor substrate and resistively connected to a first device at a first end of said first metal line and resistively connected to a second device at a second end of said first metal line; a second metal line embedded in said dielectric material layer and inductively coupled with said first metal line through a portion of said dielectric material layer; and a capacitor having a first capacitor electrode and a second capacitor electrode, wherein said first capacitor electrode is resistively connected to an end of said second metal line, and wherein said second capacitor electrode is electrically grounded, wherein said first metal line includes a first sidewall and said second metal line includes a second sidewall, wherein said first and second sidewalls are substantially parallel to each other and abut said portion of said dielectric material layer and laterally separated from each other by a substantially constant spacing. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A semiconductor structure comprising:
-
a first metal line embedded in a dielectric material layer located on a semiconductor substrate and resistively connected to a first device at a first end of said first metal line and resistively connected to a second device at a second end of said first metal line; a second metal line embedded in said dielectric material layer and inductively coupled with said first metal line through a portion of said dielectric material layer; a capacitor having a first capacitor electrode and a second capacitor electrode, wherein said first capacitor electrode is resistively connected to an end of said second metal line, and wherein said second capacitor electrode is electrically grounded; and a grounded metal line embedded in said dielectric material layer and inductively coupled with said first metal line and grounded to said semiconductor substrate at a first end of said grounded metal line in proximity to said first device and grounded to said semiconductor substrate at a second end of said grounded metal line in proximity to said second device or to a system bus ground line. - View Dependent Claims (11, 12, 13)
-
-
14. A semiconductor structure comprising:
-
a first metal line embedded in a dielectric material layer located on a semiconductor substrate and resistively connected to a first device at a first end of said first metal line and resistively connected to a second device at a second end of said first metal line; a second metal line embedded in said dielectric material layer and inductively coupled with said first metal line through a portion of said dielectric material layer; a capacitor having a first capacitor electrode and a second capacitor electrode, wherein said first capacitor electrode is resistively connected to an end of said second metal line, and wherein said second capacitor electrode is electrically grounded; at least one additional capacitively-grounded metal line structure, wherein each of said at least one additional capacitively-grounded line structure comprises; an additional metal line embedded in said dielectric layer and inductively coupled with said first metal line through a portion of said dielectric material layer; and an additional capacitor having a first additional capacitor electrode and a second additional capacitor electrode, wherein said first additional capacitor electrode is resistively connected to an end of said additional metal line, and wherein said second additional capacitor electrode is electrically grounded. - View Dependent Claims (15, 16, 17, 18, 19, 20)
-
Specification