Semiconductor device with oxide semiconductor

• US 8,823,439 B2
• Filed: 12/28/2012
• Issued: 09/02/2014
• Est. Priority Date: 01/22/2010
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun
• Primary Examiner(s): Wells, Kenneth B.
• Application Number:
  US13/729,272
• Publication Number:
  US 20130119378A1
• Time in Patent Office: 613 Days
• Field of Search: 327/310, 327/311, 327/328, 361/56, 361/91.2
• US Class Current: 327/310
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/1033 with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with channel and gate aligned in the lengthwise direction H01L29/42376; with buried channel H01L29/7838
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H03K 17/0822 in field-effect transistor switches

Abstract

The semiconductor device includes a power element which is in an on state when voltage is not applied to a gate, a switching field-effect transistor for applying first voltage to the gate of the power element, and a switching field-effect transistor for applying voltage lower than the first voltage to the gate of the power element. The switching field-effect transistors have small off-state current.

Claims

1. A semiconductor device comprising:

a first transistor comprising a first terminal, a second terminal, and a gate;

a second transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the first terminal of the first transistor;

a third transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the second terminal of the second transistor;

a capacitor comprising a first terminal and a second terminal, the first terminal electrically connected to the second terminal of the second transistor and the first terminal of the third transistor;

a fourth transistor comprising a first terminal, a second terminal, and a gate electrically connected to the first terminal of the first transistor and the first terminal of the second transistor;

a first inverter comprising an input terminal and an output terminal, the input terminal electrically connected to the gate of the first transistor, the output terminal electrically connected to the gate of the second transistor;

a second inverter comprising an input terminal and an output terminal, the output terminal electrically connected to the input terminal of the first inverter;

a fifth transistor comprising a first terminal, a second terminal, and a gate, the second terminal electrically connected to the first terminal of the fourth transistor; and

a plurality of transistors electrically connected in series, a gate and a first terminal of each of the plurality of transistors electrically connected to each other, one of the plurality of transistors comprising the gate electrically connected to the gate of the fifth transistor,

wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises an oxide semiconductor layer comprising indium, zinc, and a metal element other than indium and zinc,

wherein each of the first transistor, the second transistor, and the third transistor is an re-channel type transistor, and

wherein the fourth transistor is a depletion type transistor.

2. The semiconductor device according to claim 1, further comprising:

an input terminal directly connected to the second terminal of the fourth transistor;

an output terminal directly connected to the first terminal of the fourth transistor;

a high voltage generation source electrically connected to the second terminal of the first transistor; and

a low voltage generation source electrically connected to the second terminal of the third transistor.

3. The semiconductor device according to claim 1, further comprising:

a high voltage generation source electrically connected to the second terminal of the third transistor; and

a low voltage generation source electrically connected to the second terminal of the first transistor.

4. The semiconductor device according to claim 1, wherein the metal element is gallium.

5. The semiconductor device according to claim 1, wherein a hydrogen concentration in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

6. The semiconductor device according to claim 1, wherein a carrier density in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

7. The semiconductor device according to claim 1, wherein, in the fourth transistor, one of the first terminal and the second terminal is surrounded by the gate.

8. The semiconductor device according to claim 1, wherein, in the fourth transistor, the oxide semiconductor layer comprises a region not overlapping with any of the first terminal, the second terminal, and the gate.

9. The semiconductor device according to claim 1, wherein a hydrogen concentration in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than or equal to 1×

1016/cm3.

10. The semiconductor device according to claim 1, wherein a carrier density in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than 5×

10¹⁴/cm³.

11. A semiconductor device comprising:

a first transistor comprising a first terminal, a second terminal, and a gate;

a second transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the first terminal of the first transistor;

a third transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the second terminal of the second transistor;

a capacitor comprising a first terminal and a second terminal, the first terminal electrically connected to the second terminal of the second transistor and the first terminal of the third transistor;

a fourth transistor comprising a first terminal, a second terminal, and a gate electrically connected to the first terminal of the first transistor and the first terminal of the second transistor;

a first inverter comprising an input terminal and an output terminal, the input terminal electrically connected to the gate of the first transistor, the output terminal electrically connected to the gate of the second transistor;

a second inverter comprising an input terminal and an output terminal, the output terminal electrically connected to the input terminal of the first inverter;

a fifth transistor comprising a first terminal, a second terminal, and a gate, the second terminal electrically connected to the first terminal of the fourth transistor;

a plurality of transistors electrically connected in series, a gate and a first terminal of each of the plurality of transistors electrically connected to each other, one of the plurality of transistors comprising the gate electrically connected to the gate of the fifth transistor; and

a resistor electrically connected between the first terminal of the fifth transistor and the plurality of transistors,

wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises an oxide semiconductor layer comprising indium, zinc, and a metal element other than indium and zinc,

wherein each of the first transistor, the second transistor, and the third transistor is an re-channel type transistor, and

wherein the fourth transistor is a depletion type transistor.

12. The semiconductor device according to claim 11, further comprising:

an input terminal directly connected to the second terminal of the fourth transistor;

an output terminal directly connected to the first terminal of the fourth transistor;

a high voltage generation source electrically connected to the second terminal of the first transistor; and

a low voltage generation source electrically connected to the second terminal of the third transistor.

13. The semiconductor device according to claim 11, further comprising:

a high voltage generation source electrically connected to the second terminal of the third transistor; and

a low voltage generation source electrically connected to the second terminal of the first transistor.

14. The semiconductor device according to claim 11, wherein the metal element is gallium.

15. The semiconductor device according to claim 11, wherein a hydrogen concentration in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

16. The semiconductor device according to claim 11, wherein a carrier density in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

17. The semiconductor device according to claim 11, wherein, in the fourth transistor, one of the first terminal and the second terminal is surrounded by the gate.

18. The semiconductor device according to claim 11, wherein, in the fourth transistor, the oxide semiconductor layer comprises a region not overlapping with any of the first terminal, the second terminal, and the gate.

19. The semiconductor device according to claim 11, wherein a hydrogen concentration in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than or equal to 1×

10¹⁶/cm³.

20. The semiconductor device according to claim 11, wherein a carrier density in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than 5×

10¹⁴/cm³.

21. A semiconductor device comprising:

a first transistor comprising a first terminal, a second terminal, and a gate;

a second transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the first terminal of the first transistor;

a third transistor comprising a first terminal, a second terminal, and a gate, the first terminal electrically connected to the second terminal of the second transistor;

a capacitor comprising a first terminal and a second terminal, the first terminal electrically connected to the second terminal of the second transistor and the first terminal of the third transistor;

a fourth transistor comprising a first terminal, a second terminal, and a gate electrically connected to the first terminal of the first transistor and the first terminal of the second transistor;

a first inverter comprising an input terminal and an output terminal, the input terminal electrically connected to the gate of the first transistor, the output terminal electrically connected to the gate of the second transistor;

a second inverter comprising an input terminal and an output terminal, the output terminal electrically connected to the input terminal of the first inverter;

a fifth transistor comprising a first terminal, a second terminal, and a gate, the second terminal electrically connected to the first terminal of the fourth transistor; and

a plurality of transistors electrically connected in series, a gate and a first terminal of each of the plurality of transistors electrically connected to each other, one of the plurality of transistors comprising the gate electrically connected to the gate of the fifth transistor; and

an AND circuit comprising input terminals and an output terminal, the output terminal electrically connected to the gate of the third transistor,

wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises an oxide semiconductor layer comprising indium, zinc, and a metal element other than indium and zinc,

wherein the oxide semiconductor layer in each of the first transistor, the second transistor, and the third transistor is an i-type or substantially i-type oxide semiconductor layer,

wherein the oxide semiconductor layer in the fourth transistor is an n-type oxide semiconductor layer, and

wherein each of the first transistor, the second transistor, and the third transistor is an n-channel type transistor, and

wherein the fourth transistor is a depletion type transistor.

22. The semiconductor device according to claim 21, further comprising:

an input terminal directly connected to the second terminal of the fourth transistor;

an output terminal directly connected to the first terminal of the fourth transistor;

a high voltage generation source electrically connected to the second terminal of the first transistor; and

a low voltage generation source electrically connected to the second terminal of the third transistor.

23. The semiconductor device according to claim 21, further comprising:

a high voltage generation source electrically connected to the second terminal of the third transistor; and

a low voltage generation source electrically connected to the second terminal of the first transistor.

24. The semiconductor device according to claim 21, wherein the metal element is gallium.

25. The semiconductor device according to claim 21, wherein a hydrogen concentration in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

26. The semiconductor device according to claim 21, wherein a carrier density in the oxide semiconductor layer of the fourth transistor is higher than or equal to 1×

10¹⁶/cm³ and lower than or equal to 1×

10²⁰/cm³.

27. The semiconductor device according to claim 21, wherein, in the fourth transistor, one of the first terminal and the second terminal is surrounded by the gate.

28. The semiconductor device according to claim 21, wherein, in the fourth transistor, the oxide semiconductor layer comprises a region not overlapping with any of the first terminal, the second terminal, and the gate.

29. The semiconductor device according to claim 21, wherein a hydrogen concentration in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than or equal to 1×

10¹⁶/cm³.

30. The semiconductor device according to claim 21, wherein a carrier density in the oxide semiconductor layer of at least one of the first transistor, the second transistor, and the third transistor is lower than 5×

10¹⁴/cm³.