Wake-up apparatus and wake-up method for low power sensor node
First Claim
1. A wake-up apparatus for a low power sensor node, the apparatus comprising:
- a wake-up signal detector receiving and detecting a wake-up signal of a sensor node;
a wake-up radio frequency (RF) circuit unit filtering and amplifying the wake-up signal; and
a wake-up baseband transducer detecting a wake-up address from the wake-up signal and comparing and verifying the wake-up address with a wake-up address that is provided from a server managing the sensor node, and outputting an interrupt signal for transmitting a sensing event of the sensor node or outputting a wake-up address of another sensor node in an area where the interrupt signal is to be sensed if errors are not detected when the wake-up address is verified,wherein the wake-up signal comprises;
a start packet region indicating the received signal is a wake-up signal; and
a wake-up address information region comprising a mode information region storing a wake-up mode method of the sensor node and a region storing a wake-up address of the sensor node,wherein start packet region information, indicating that the received signal is a wake-up signal, is output as a reversed value of 0 or 1 and has an output form of one of 2 bits, 8 bits, and 16 bits.
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Abstract
Provided are a wake-up apparatus and wake-up method for a low power sensor node, and more particularly, to a wake-up apparatus and wake-up method for a low power sensor node, which can extend the battery life of the sensor node and minimize the amount of power consumed by an entire sensor network power by minimizing unnecessary power consumption of the sensor node. The wake-up apparatus for a low power sensor node includes: a wake-up signal detector receiving and detecting a wake-up signal of a sensor node; a wake-up radio frequency (RF) circuit unit filtering and amplifying the wake-up signal; and a wake-up baseband transducer detecting a wake-up address from the wake-up signal and comparing and verifying the wake-up address with a wake-up address that is provided from a server managing the sensor node. The wake-up apparatus outputs an interrupt signal for transmitting a sensing event of the sensor node or outputs a wake-up address of another sensor node in an area where the interrupt signal is to be sensed if errors are not detected when the wake-up address is verified.
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Citations
10 Claims
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1. A wake-up apparatus for a low power sensor node, the apparatus comprising:
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a wake-up signal detector receiving and detecting a wake-up signal of a sensor node; a wake-up radio frequency (RF) circuit unit filtering and amplifying the wake-up signal; and a wake-up baseband transducer detecting a wake-up address from the wake-up signal and comparing and verifying the wake-up address with a wake-up address that is provided from a server managing the sensor node, and outputting an interrupt signal for transmitting a sensing event of the sensor node or outputting a wake-up address of another sensor node in an area where the interrupt signal is to be sensed if errors are not detected when the wake-up address is verified, wherein the wake-up signal comprises; a start packet region indicating the received signal is a wake-up signal; and a wake-up address information region comprising a mode information region storing a wake-up mode method of the sensor node and a region storing a wake-up address of the sensor node, wherein start packet region information, indicating that the received signal is a wake-up signal, is output as a reversed value of 0 or 1 and has an output form of one of 2 bits, 8 bits, and 16 bits. - View Dependent Claims (2, 3, 4)
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5. A wake-up method for a low power sensor node, the method comprising:
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receiving and detecting a wake-up signal of a sensor node; filtering and amplifying the received and detected wake-up signal; comparing and verifying an address with a wake-up address that is provided from a server managing the sensor node by detecting a wake-up address from the filtered and amplified wake-up signal; and outputting an interrupt signal for transmitting a sensing event of the sensor node or outputting a wake-up operation signal of another sensor node in an area where the interrupt signal is to be sensed if errors are not detected when the wake-up address is verified, wherein the wake-up signal comprises; a start packet region indicating the received signal is a wake-up signal; and a wake-up address information region comprising a mode information region storing a selected wake-up broadcast method among wake-up broadcast methods of the sensor node one of which to be selected and used upon wake-up and a region storing a wake-up address of the sensor node, and wherein start packet region information, indicating that the received signal is a wake-up signal, is output as a reversed value of 0 or 1 and has an output form of one of 2 bits, 8 bits, and 16 bits. - View Dependent Claims (6, 7)
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8. A low power sensor node comprising:
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a wake-up apparatus unit detecting a wake-up address of an input signal and comparing and verifying the detected wake-up address with a wake-up address that is provided from a server, and outputting an interrupt signal for transmitting a sensing event or outputting a wake-up operation signal if errors are not detected when the wake-up address is verified; a power source apparatus management unit receiving the interrupt signal or wake-up operation signal and supplying power; and a main RF apparatus unit transmitting the sensing event and outputting the wake-up operation signal after the power is supplied, wherein the wake-up signal comprises; a start packet region indicating the received signal is a wake-up signal; and a wake-up address information region comprising a mode information region storing a selected wake-up broadcast method among wake-up broadcast methods of the sensor node one of which to be selected and used upon wake-up and a region storing a wake-up address of the sensor node, and wherein start packet region information, indicating that the received signal is a wake-up signal, is output as a reversed value of 0 or 1 and has an output form of one of 2 bits, 8 bits, and 16 bits. - View Dependent Claims (9, 10)
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Specification