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FPGA configuration bitstream protection using multiple keys

  • US 8,826,038 B1
  • Filed: 05/18/2012
  • Issued: 09/02/2014
  • Est. Priority Date: 01/25/2005
  • Status: Active Grant
First Claim
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1. A method of processing a configuration bitstream at a user computing device comprising:

  • obtaining, at the user computing device, a plurality of encryption keys and the configuration bitstream;

    encoding the configuration bitstream using the plurality of encryption keys to generate an encrypted bit stream;

    providing the encrypted bit stream to a configuration device; and

    providing, via a JTAG interface of the user computing device, the plurality of encryption keys to an integrated circuit.

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