Automated inline defect characterization
First Claim
1. A computer implemented method for performing defect characterization comprising:
- importing a layout for a semiconductor circuit;
importing a netlist for the semiconductor circuit;
obtaining images of a semiconductor chip which comprises the semiconductor circuit during fabrication;
detecting, using one or more processors, a defect in one of the images of the semiconductor chip wherein the defect is at a location on a portion of the semiconductor chip that is represented by the layout and wherein the detecting is based on determining a critical volume; and
performing an electrical analysis of the netlist with the detected defect.
1 Assignment
0 Petitions
Accused Products
Abstract
Defect characterization is a useful tool for analyzing and improving fabrication for semiconductor chips. By using layout and netlist in combination with images of semiconductors, defects can be identified and analyzed. Electrical simulation can be performed on the netlist, based on the presence of the defect that was detected. Layout geometries where the defect was detected can be binned and a search can be performed of the remainder of the layout for similar groupings of layout geometries. Various representations of the semiconductor can be cross mapped, including layout, schematic, and netlist. The presence of certain defects can be correlated to yield, performance, and other characteristics.
-
Citations
41 Claims
-
1. A computer implemented method for performing defect characterization comprising:
-
importing a layout for a semiconductor circuit; importing a netlist for the semiconductor circuit; obtaining images of a semiconductor chip which comprises the semiconductor circuit during fabrication; detecting, using one or more processors, a defect in one of the images of the semiconductor chip wherein the defect is at a location on a portion of the semiconductor chip that is represented by the layout and wherein the detecting is based on determining a critical volume; and performing an electrical analysis of the netlist with the detected defect. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
-
-
29. A computer program product embodied in a non-transitory computer readable medium, when executed by a computer, causes the computer to perform defect characterization, the computer program product comprising:
-
code for importing a layout for a semiconductor circuit; code for importing a netlist for the semiconductor circuit; code for obtaining images of a semiconductor chip which comprises the semiconductor circuit during fabrication; code for detecting a defect in one of the images of the semiconductor chip wherein the defect is at a location on a portion of the semiconductor chip that is represented by the layout and wherein the detecting is based on determining a critical volume; and code for performing electrical analysis of the netlist with the detected defect.
-
-
30. A computer system for defect characterization comprising:
-
a memory for storing instructions; one or more processors coupled to the memory wherein the one or more processors, when executing the instructions which are stored, are configured to; import a layout for a semiconductor circuit; import a netlist for the semiconductor circuit; obtain images of a semiconductor chip which comprises the semiconductor circuit during fabrication; detect a defect in one of the images of the semiconductor chip wherein the defect is at a location on a portion of the semiconductor chip that is represented by the layout and wherein detection is based on determining a critical volume; and perform an electrical analysis of the netlist with detected defect. - View Dependent Claims (31, 32, 33, 34, 35)
-
-
36. A computer program product embodied in a non-transitory computer readable medium, when executed by a computer, causes the computer to perform defect characterization, the computer program product comprising:
-
code for importing a layout for a semiconductor circuit; code for importing a netlist for the semiconductor circuit; code for obtaining images of a semiconductor chip which comprises the semiconductor circuit during fabrication; code for detecting a defect larger than a critical dimension in one of the images of the semiconductor chip and wherein the detecting is based on determining a critical volume; and code for performing electrical analysis of the netlist with the detected defect. - View Dependent Claims (37, 38, 39, 40, 41)
-
Specification