Semiconductor device and method for manufacturing semiconductor device having oxide semiconductor layer

• US 8,829,586 B2
• Filed: 01/26/2011
• Issued: 09/09/2014
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Endo, Yuta, Saito, Takayuki, Yamazaki, Shunpei
• Primary Examiner(s): Armand, Marc
• Application Number:
  US13/014,075
• Publication Number:
  US 20110193079A1
• Time in Patent Office: 1,322 Days
• Field of Search: 257/314, 257/347, 257/E21.051, 257/E21.057, 257/E21.17, 257/43, 438/381, 438/663
• US Class Current: 257/314
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

In a miniaturized transistor, a gate insulating layer is required to reduce its thickness; however, in the case where the gate insulating layer is a single layer of a silicon oxide film, a physical limit on thinning of the gate insulating layer might occur due to an increase in tunneling current, i.e. gate leakage current. With the use of a high-k film whose relative permittivity is higher than or equal to 10 is used for the gate insulating layer, gate leakage current of the miniaturized transistor is reduced. With the use of the high-k film as a first insulating layer whose relative permittivity is higher than that of a second insulating layer in contact with an oxide semiconductor layer, the thickness of the gate insulating layer can be thinner than a thickness of a gate insulating layer considered in terms of a silicon oxide film.

Claims

1. A semiconductor device comprising:

a base insulating layer over a substrate;

a transistor over the base insulating layer, the transistor comprising;

an oxide semiconductor layer over the base insulating layer, the oxide semiconductor layer comprising a channel formation region, wherein the channel formation region comprises indium and oxygen;

a source electrode and a drain electrode in contact with the oxide semiconductor layer;

a first gate insulating layer over and in contact with the oxide semiconductor layer;

a second gate insulating layer over the first gate insulating layer; and

a gate electrode overlapping with the oxide semiconductor layer over the second gate insulating layer; and

a capacitor comprising;

a first electrode;

a portion of the oxide semiconductor layer over the first electrode;

a dielectric layer over the portion of the oxide semiconductor layer over the first electrode;

a second electrode over the dielectric layer, wherein the first electrode and the second electrode overlap each other with the dielectric layer and the portion of the oxide semiconductor layer interposed therebetween,

wherein the second gate insulating layer has higher relative permittivity than the first gate insulating layer.

2. The semiconductor device according to claim 1, wherein the base insulating layer, the first gate insulating layer, and the oxide semiconductor layer are formed by a sputtering method.

3. The semiconductor device according to claim 1, wherein the second gate insulating layer comprises a material whose relative permittivity is higher than 10.

4. The semiconductor device according to claim 1, wherein the second gate insulating layer comprises an insulating film containing hafnium.

5. The semiconductor device according to claim 1, wherein the second gate insulating layer comprises one selected from the group consisting of hafnium oxide, hafnium silicate, hafnium oxynitride silicate, hafnium aluminate, zirconium oxide, tantalum oxide, and zirconium aluminum oxide.

6. An electronic device comprising the semiconductor device according to claim 1.

7. The semiconductor device according to claim 1, wherein the dielectric layer comprises a portion of the first gate insulating layer and a portion of the second gate insulating layer.

8. A semiconductor device comprising:

a transistor comprising;

a gate electrode over a substrate;

a first gate insulating layer over the gate electrode;

a second gate insulating layer over the first gate insulating layer;

an oxide semiconductor layer over and in contact with the second gate insulating layer, the oxide semiconductor layer comprising a channel formation region, wherein the channel formation region comprises indium and oxygen; and

a source electrode and a drain electrode in contact with the oxide semiconductor layer; and

an insulating layer over and in contact with the oxide semiconductor layer,

wherein the first gate insulating layer has higher relative permittivity than the second gate insulating layer.

9. The semiconductor device according to claim 8, wherein the second gate insulating layer, the insulating layer, and the oxide semiconductor layer are formed by a sputtering method.

10. The semiconductor device according to claim 8, wherein the first gate insulating layer comprises a material whose relative permittivity is higher than 10.

11. The semiconductor device according to claim 8, wherein the first gate insulating layer comprises an insulating film containing hafnium.

12. The semiconductor device according to claim 8, wherein the first gate insulating layer comprises one selected from the group consisting of hafnium oxide, hafnium silicate, hafnium oxynitride silicate, hafnium aluminate, zirconium oxide, tantalum oxide, and zirconium aluminum oxide.

13. An electronic device comprising the semiconductor device according to claim 8.

14. A semiconductor device comprising:

a transistor comprising;

a first gate electrode over a substrate;

a first gate insulating layer provided so as to be over and in contact with the first gate electrode;

a second gate insulating layer provided so as to be over and in contact with the first gate insulating layer;

an oxide semiconductor layer provided so as to be over and in contact with the second gate insulating layer, the oxide semiconductor layer comprising a channel formation region, wherein the channel formation region comprises indium and oxygen;

a source electrode and a drain electrode in contact with the oxide semiconductor layer;

a third gate insulating layer provided so as to be over and in contact with the oxide semiconductor layer;

a fourth gate insulating layer provided so as to be over and in contact with the third gate insulating layer; and

a second gate electrode overlapping with the first gate electrode and over and in contact with the fourth gate insulating layer,

wherein the first gate insulating layer has higher relative permittivity than the second gate insulating layer, and

wherein the fourth gate insulating layer has higher relative permittivity than the third gate insulating layer.

15. The semiconductor device according to claim 14, wherein each of the first gate insulating layer and the fourth gate insulating layer comprises a material whose relative permittivity is higher than 10.

16. The semiconductor device according to claim 14, wherein each of the first gate insulating layer and the fourth gate insulating layer comprises an insulating film containing hafnium.

17. The semiconductor device according to claim 14, wherein each of the first gate insulating layer and the fourth gate insulating layer comprises one selected from the group consisting of hafnium oxide, hafnium silicate, hafnium oxynitride silicate, hafnium aluminate, zirconium oxide, tantalum oxide, and zirconium aluminum oxide.

18. An electronic device comprising the semiconductor device according to claim 14.

19. A method for manufacturing a semiconductor device comprising a transistor, the method comprising the steps of:

forming a gate electrode over a substrate;

forming a first gate insulating layer over the gate electrode;

forming a second gate insulating layer over the first gate insulating layer;

forming an oxide semiconductor layer over and in contact with the second gate insulating layer, the oxide semiconductor layer comprising a channel formation region, wherein the channel formation region comprises indium and oxygen; and

forming a source electrode and a drain electrode in contact with the oxide semiconductor layer;

wherein the first gate insulating layer has higher relative permittivity than the second gate insulating layer, and

wherein the transistor comprises the gate electrode over the substrate, the first gate insulating layer over the gate electrode, the second gate insulating layer over the first gate insulating layer, the oxide semiconductor layer over and in contact with the second gate insulating layer, and the source electrode and the drain electrode in contact with the oxide semiconductor layer.

20. The method according to claim 19, wherein the second gate insulating layer and the oxide semiconductor layer are formed by a sputtering method.

21. The method according to claim 19, wherein the first gate insulating layer comprises a material whose relative permittivity is higher than 10.

22. The method according to claim 19, wherein the first gate insulating layer comprises an insulating film containing hafnium.

23. The method according to claim 19, wherein the first gate insulating layer comprises one selected from the group consisting of hafnium oxide, hafnium silicate, hafnium oxynitride silicate, hafnium aluminate, zirconium oxide, tantalum oxide, and zirconium aluminum oxide.

24. The method according to claim 19 further comprising the step of performing heat treatment to the oxide semiconductor layer at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate under an atmosphere including nitrogen, oxygen, or a rare gas.

25. The method according to claim 19 further comprising the step of forming an insulating film over and in contact with the oxide semiconductor layer.

26. The method according to claim 19 further comprising the steps of:

forming a third gate insulating layer over and in contact with the oxide semiconductor layer,

forming a fourth gate insulating layer over and in contact with the third gate insulating layer, and

forming a second gate electrode over the fourth gate insulating layer,

wherein the fourth gate insulating layer has higher relative permittivity than the third gate insulating layer,

wherein the transistor further comprises the third gate insulating layer over and in contact with the oxide semiconductor layer, the fourth gate insulating layer over and in contact with the third gate insulating layer, and the second gate electrode over the fourth gate insulating layer.

27. A method for manufacturing a semiconductor device comprising a transistor, the method comprising the steps of:

forming a source electrode and a drain electrode over a substrate;

forming an oxide semiconductor layer of the transistor over and in electrical contact with the source electrode and the drain electrode, the oxide semiconductor layer comprising a channel formation region, wherein the channel formation region comprises indium and oxygen;

forming a first gate insulating layer of the transistor over and in contact with the oxide semiconductor layer;

forming a second gate insulating layer of the transistor over the first gate insulating layer;

forming a gate electrode of the transistor over the second gate insulating layer; and

forming an electrode over the second gate insulating layer to form a capacitor between the electrode and a portion of one of the source electrode and the drain electrode with the oxide semiconductor layer, the first gate insulating layer and the second gate insulating layer interposed therebetween;

wherein the second gate insulating layer has higher relative permittivity than the first gate insulating layer.

28. The method according to claim 27, wherein the first gate insulating layer and the oxide semiconductor layer are formed by a sputtering method.

29. The method according to claim 27, wherein the second gate insulating layer comprises a material whose relative permittivity is higher than 10.

30. The method according to claim 27, wherein the second gate insulating layer comprises an insulating film containing hafnium.

31. The method according to claim 27, wherein the second gate insulating layer comprises one selected from the group consisting of hafnium oxide, hafnium silicate, hafnium oxynitride silicate, hafnium aluminate, zirconium oxide, tantalum oxide, and zirconium aluminum oxide.

32. The method according to claim 27 further comprising the step of performing heat treatment to the oxide semiconductor layer at a temperature higher than or equal to 400°

C. and lower than a strain point of the substrate under an atmosphere including nitrogen, oxygen, or a rare gas.