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Shielded gate trench MOSFET package

  • US 8,829,603 B2
  • Filed: 08/18/2011
  • Issued: 09/09/2014
  • Est. Priority Date: 08/18/2011
  • Status: Active Grant
First Claim
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1. A shielded gate field effect transistor, comprising:

  • a) a substrate of a first conductivity type;

    b) an epitaxial layer of the first conductivity type supported on top of the substrate;

    c) a body layer of a second conductivity type that is opposite the first conductivity type formed above the epitaxial layer;

    d) a trench formed within the body layer and epitaxial layer, wherein the trench is lined with a dielectric layer;

    e) a shield electrode formed within a lower portion of the trench, wherein the shield electrode is insulated from the epitaxial layer by the dielectric layer;

    f) a gate electrode formed within the trench above the shield electrode, wherein the gate electrode is insulated from the shield electrode by an additional dielectric layer;

    g) one or more source regions of the first conductivity type formed within a top surface of the body layer, wherein each source region is adjacent a sidewall of the trench;

    h) a source pad formed above the body layer, wherein the source pad is electrically connected to the one or more source regions and insulated from the gate electrode and the shield electrode, the source pad providing an external contact to the source region;

    i) a gate pad formed above the body layer, wherein the gate pad is electrically connected to the gate electrode and insulated from the one or more source regions and the shield electrode, the gate pad providing an external contact to the gate electrode; and

    j) a shield pad formed above the body layer, wherein the shield pad is electrically connected to the shield electrode and electrically insulated from the one or more source regions and the gate electrode, the shield pad providing an external contact to the shield electrode.

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