Power device with monolithically integrated RC snubber

• US 8,829,624 B2
• Filed: 06/25/2009
• Issued: 09/09/2014
• Est. Priority Date: 06/30/2008
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Inventors: Gladish, Jon, Black, Arthur
• Primary Examiner(s): Tornow, Mark
• Assistant Examiner(s): BOYLE, ABBIGALE A
• Application Number:
  US12/492,101
• Publication Number:
  US 20100163950A1
• Time in Patent Office: 1,902 Days
• Field of Search: 257/302, 257/401, 257/328, 257/E27.016, 257/E27.033, 257/E27.045, 361/91.7
• US Class Current: 257/401
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4175 for lateral devices where the connection to the source or drain region is done through at least one part of the semiconductor substrate thickness, e.g. with connecting sink or with via-hole
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66181 Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7817 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7835 with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit

Abstract

In one general aspect, a semiconductor structure can include a power transistor including a body region extending in a silicon region, a gate electrode insulated from the body region by a gate dielectric, a source region extending in the body region where the source region is of opposite conductivity type from the body region, a source interconnect contacting the source region, and a backside drain. The semiconductor structure can include an RC snubber monolithically integrated with the power transistor in a die. The RC snubber can include a snubber electrode insulated from the silicon region by a snubber dielectric such that the snubber electrode and the silicon region form a snubber capacitor.

Claims

1. A semiconductor structure, comprising:

a power transistor including;

a body region extending in a silicon region,

a gate electrode insulated from the body region by a gate dielectric,

a source region extending in the body region, the source region being of opposite conductivity type from the body region,

a source interconnect contacting the source region, and

a backside drain; and

an RC snubber monolithically integrated with the power transistor in a die, the RC snubber including;

a snubber electrode insulated from the silicon region by a snubber dielectric such that the snubber electrode and the silicon region form a snubber capacitor, the snubber electrode being connected to the source interconnect to form a snubber resistor between the snubber capacitor and the source interconnect, the gate electrode having a bottom surface at a depth shallower than a depth of a bottom surface of the snubber electrode, the RC snubber configured to substantially dampen output ringing when the power transistor switches states.

2. The semiconductor structure of claim 1, wherein the RC snubber includes a snubber trench with the snubber electrode disposed therein and the power transistor includes a gate trench with the gate electrode disposed therein, the snubber trench is aligned parallel to the gate trench,

the semiconductor structure further comprising:

at least two columns of contacts in contact with the source interconnect and the snubber electrode.

3. The semiconductor structure of claim 1, wherein the power transistor includes a gate trench, the gate trench includes the gate electrode and includes a shield electrode under the gate electrode.

4. The semiconductor structure of claim 1, wherein the RC snubber includes a snubber trench extending deeper than a gate trench included in the power transistor.

5. The semiconductor structure of claim 1, wherein the snubber electrode is recessed in a snubber trench of the RC snubber,

the semiconductor structure further comprising:

a dielectric cap insulating portions of the snubber electrode from the source interconnect.

6. The semiconductor structure of claim 1, wherein the RC snubber includes a snubber trench, and the power transistor includes a gate trench, the snubber trench has a depth the same as a depth of the gate trench, the RC snubber including a dielectric layer extending along a bottom of the gate trench thicker than the dielectric layer of the RC snubber.

7. The semiconductor structure of claim 1, wherein the RC snubber includes a snubber trench and the power transistor includes a gate trench, the snubber trench is included within rows of snubber trenches dispersed among rows of gate trenches including the gate trench.

8. The semiconductor structure of claim 1, wherein the power transistor is formed in an active region of the die, and the RC snubber is formed in a region extending under a gate pad electrically connected to the gate electrode.

9. The semiconductor structure of claim 1, wherein the snubber resistor has a resistance in a range of 0.5 to 2.0 ohms.

10. The semiconductor structure of claim 1, wherein the snubber resistor has a resistance value proportional to √

{square root over (L/C)}, where C represents an output capacitance of the power transistor when the power transistor is turned off, and L includes a parasitic inductance of a package in which the semiconductor structure is housed.

11. The semiconductor structure of claim 1, wherein the snubber capacitor has a capacitance value greater than an output capacitance of the power transistor when the power transistor is turned off.

15. The semiconductor structure of claim 1 wherein the snubber capacitor and the snubber resistor are configured in a distributed fashion.

21. The semiconductor structure of claim 1, wherein the RC snubber includes a first snubber trench and a second snubber trench, the semiconductor structure further comprising:

a Schottky contact formed between the first snubber trench and the second snubber trench.

23. The semiconductor structure of claim 1, wherein the RC snubber includes a snubber trench, the snubber trench includes the snubber electrode, the body region excludes a source region on a side of the body region contacting the snubber trench.

24. The semiconductor structure of claim 1, wherein the power transistor includes a gate trench, the gate trench includes the gate electrode and includes a shield electrode under the gate electrode, the shield electrode is insulated from the silicon region by a shield dielectric that is thicker than a gate dielectric lining an upper sidewall of the gate trench, the snubber electrode is insulated from the silicon region by a snubber dielectric having a thickness equal to or different than a thickness of the shield dielectric.

12. A semiconductor die, comprising:

a power transistor including a gate electrode, a drain interconnect contacting a drain region on a backside of the semiconductor die, and a source interconnect contacting a source region;

an RC snubber monolithically integrated with the power transistor into the semiconductor die, the RC snubber including a snubber electrode aligned parallel to the gate electrode, the gate electrode having a bottom surface at a depth shallower than a depth of a bottom surface of the snubber electrode,

the snubber electrode being insulated from the drain region by a snubber dielectric such that the snubber electrode and the drain region form a snubber capacitor; and

at least two columns of contacts in contact with the source interconnect and in contact with the snubber electrode to form a snubber resistor.

13. The semiconductor die of claim 12, wherein the snubber resistor has a resistance in a range of 0.5 to 2.0 ohms.

14. The semiconductor die of claim 12, wherein the snubber resistor has a resistance value proportional to √

{square root over (L/C)}, where C represents an output capacitance of the power transistor when the power transistor is turned off, and L includes a parasitic inductance of a package in which the semiconductor die is housed.

16. The semiconductor die of claim 12, wherein the snubber capacitor and the snubber resistor function to substantially dampen output ringing when the power transistor switches states.

17. The semiconductor die of claim 12, wherein the RC snubber includes a snubber trench and a dielectric cap disposed over the snubber trench.

25. The semiconductor die of claim 12, wherein the power transistor includes a gate trench, the gate trench includes the gate electrode and includes a shield electrode.

26. The semiconductor die of claim 12, wherein the power transistor includes a gate trench with the gate electrode disposed therein, the RC snubber includes a snubber trench with the snubber electrode disposed therein, the snubber trench has a depth deeper than a depth of the gate trench.

27. The semiconductor die of claim 12, wherein the snubber electrode is recessed in a snubber trench of the RC snubber, and the gate electrode is recessed in a gate trench of the power transistor.

28. The semiconductor die of claim 12, wherein the RC snubber includes a first snubber trench and a second snubber trench, the semiconductor die further comprising:

a Schottky contact between the first snubber trench and the second snubber trench.

18. An apparatus, comprising:

a high-side switch including a high-side power transistor and a high-side RC snubber monolithically integrated in a die,

the high-side power transistor including;

a body region in a silicon region,

a gate electrode disposed in a gate trench and insulated from the silicon region by a gate dielectric,

a source region extending in the body region,

a source interconnect contacting the source region, and

a backside drain,

the high-side RC snubber including;

a snubber capacitor formed by a snubber electrode disposed in a snubber trench and insulated from the silicon region by a snubber dielectric, the gate electrode having a bottom surface at a depth less than a depth of a bottom surface of the snubber electrode, and

a snubber resistor formed by the snubber electrode being connected to the source interconnect; and

a low-side switch including a low-side power transistor and a low-side RC snubber.

19. The apparatus of claim 18, wherein the die is a first die, the low-side power transistor and the low-side RC snubber are monolithically integrated in a second die.

20. The apparatus of claim 18, wherein the high-side RC snubber is configured to substantially dampen output ringing when the power transistor switches states.

29. The apparatus of claim 18, wherein the high-side power transistor includes a gate trench, the gate trench includes the gate electrode and includes a shield electrode.

22. A semiconductor structure, comprising:

a power transistor including;

a body region extending in a silicon region,

a gate electrode insulated from the body region by a gate dielectric,

a source region extending in the body region, the source region being of opposite conductivity type from the body region,

a source interconnect contacting the source region, and

a backside drain; and

an RC snubber monolithically integrated with the power transistor in a single die, the RC snubber including;

a snubber electrode insulated from the silicon region by a snubber dielectric such that the snubber electrode and the silicon region form a snubber capacitor, the gate electrode having bottom surface at a depth less than a depth of a bottom surface of the snubber electrode, the snubber electrode being connected to the source interconnect to form a snubber resistor between the snubber capacitor and the source interconnect,

the snubber capacitor having a capacitance value greater than an output capacitance of the power transistor when the power transistor is turned off.

30. The semiconductor structure of claim 22, wherein the power transistor includes a gate trench, the gate trench includes the gate electrode and includes a shield electrode.

31. The semiconductor structure of claim 22, wherein the power transistor includes a gate trench with the gate electrode disposed therein, the gate electrode is recessed in the gate trench, the RC snubber includes a snubber trench with the snubber electrode disposed therein, the snubber electrode is recessed in the snubber trench, the snubber trench has a depth deeper than a depth of the gate trench.