Semiconductor display device

• US 8,835,271 B2
• Filed: 04/05/2013
• Issued: 09/16/2014
• Est. Priority Date: 04/09/2002
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Murakami, Satoshi, Hayakawa, Masahiko, Kato, Kiyoshi, Osame, Mitsuaki
• Primary Examiner(s): Tran, Minh-Loan T
• Assistant Examiner(s): Erdem, Fazli
• Application Number:
  US13/857,659
• Publication Number:
  US 20130221361A1
• Time in Patent Office: 529 Days
• US Class Current: 438/311
• CPC Class Codes: G02F 1/133357 Planarisation layers
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1244 for preventing breakage, peeling or short circuiting
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 33/52 Encapsulations
• CPC Class Codes: H10K 50/84 Passivation; Containers; Encapsulations
• CPC Class Codes: H10K 50/844 Encapsulations
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/873 Encapsulations

Abstract

It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film. Then, in the opening part of the organic resin film, a gate insulating film and the two layer inorganic insulating film containing nitrogen are opened partially by etching to expose an active layer of the TFT.

Claims

1. A method for manufacturing a semiconductor device comprising:

forming a first insulating film;

forming a second insulating film over the first insulating film, so that the second insulating film has a first opening;

forming a third insulating film over the second insulating film so as to be in contact with the first insulating film in the first opening; and

forming a second opening in the third insulating film and the first insulating film,

wherein a section of an edge portion of the first opening curves,

wherein a curvature center of the section of the first opening exists on the second insulating film side,

wherein the third insulating film is in contact with the curved surface of the second insulating film,

wherein the second opening is surrounded by the first opening, and

wherein the second opening deviates to one direction in the first opening.

2. The method according to claim 1, wherein the first insulating film comprises nitrogen.

3. The method according to claim 1, wherein the second insulating film comprises resin.

4. The method according to claim 1, wherein the third insulating film comprises nitrogen.

5. The method according to claim 1, wherein the second opening is formed by dry etching.

6. A method for manufacturing a semiconductor device comprising:

forming a first insulating film;

forming a second insulating film over the first insulating film, so that the second insulating film has a first opening;

forming a third insulating film over the second insulating film so as to be in contact with the first insulating film in the first opening; and

forming a second opening in the third insulating film and the first insulating film; and

forming a conductive film over the third insulating film and in the second opening,

wherein a section of an edge portion of the first opening curves,

wherein a curvature center of the section of the first opening exists on the second insulating film side,

wherein the third insulating film is in contact with the curved surface of the second insulating film,

wherein the second opening is surrounded by the first opening, and

wherein the second opening deviates to one direction in the first opening.

7. The method according to claim 6, wherein the first insulating film comprises nitrogen.

8. The method according to claim 6, wherein the second insulating film comprises resin.

9. The method according to claim 6, wherein the third insulating film comprises nitrogen.

10. The method according to claim 6, wherein the second opening is formed by dry etching.

11. A method for manufacturing a semiconductor device comprising:

forming a semiconductor layer;

forming a first inorganic insulating film comprising nitrogen over the semiconductor layer;

forming a photosensitive organic resin film over the first inorganic insulating film, so that the photosensitive organic resin film has a first opening;

forming a second inorganic insulating film comprising nitrogen over the photosensitive organic resin film so as to be in contact with the first inorganic insulating film in the first opening;

forming a second opening in the second inorganic insulating film and the first inorganic insulating film; and

forming a conductive film over the second inorganic insulating film and in the second opening,

wherein the second opening is surrounded by the first opening, and

wherein the second opening deviates to one direction in the first opening.

12. The method according to claim 11, wherein a section of an edge portion of the first opening curves.

13. The method according to claim 11, wherein the second opening is formed by dry etching.