Semiconductor device and method for driving the same

• US 8,836,626 B2
• Filed: 06/28/2012
• Issued: 09/16/2014
• Est. Priority Date: 07/15/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ikeda, Takayuki
• Primary Examiner(s): PHAM, VIET DAVID
• Application Number:
  US13/535,576
• Publication Number:
  US 20130016035A1
• Time in Patent Office: 810 Days
• Field of Search: 345 87- 98
• US Class Current: 345/92
• CPC Class Codes: H01L 27/14601 Structural or functional details thereof
• CPC Class Codes: H01L 27/14605 Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery
• CPC Class Codes: H01L 27/14614 having a special gate structure
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 29/22 including, apart from doping materials or other impurities, only AIIBVI compounds
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An image sensor is provided which is capable of holding data for one frame period or longer and conducting a difference operation with a small number of elements. A photosensor is provided in each of a plurality of pixels arranged in a matrix, each pixel accumulates electric charge in a data holding portion for one frame period or longer, and an output of the photosensor changes in accordance with the electric charge accumulated in the data holding portion. As a writing switch element for the data holding portion, a transistor with small leakage current (sufficiently smaller than 1×10⁻¹⁴ A) is used. As an example of the transistor with small leakage current, there is a transistor having a channel formed in an oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

a plurality of pixels arranged in a matrix, each of the plurality of pixels being electrically connected to first to seventh wirings and comprising;

a photodiode;

a first capacitor;

a second capacitor;

a first transistor;

a second transistor;

a third transistor; and

a data holding portion,

wherein a cathode of the photodiode is electrically connected to the first wiring,

wherein an anode of the photodiode is electrically connected to a first electrode of the first capacitor,

wherein a first electrode of the second capacitor is electrically connected to the third wiring,

wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,

wherein a gate of the first transistor is electrically connected to the sixth wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the fourth wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the other of the source and the drain of the third transistor is electrically connected to the seventh wiring,

wherein a gate of the third transistor is electrically connected to the fifth wiring, and

wherein the data holding portion is configured by electrically connecting a second electrode of the first capacitor, a second electrode of the second capacitor, the other of the source and the drain of the first transistor, and a gate of the second transistor.

3. The semiconductor device according to claim 1, wherein a leakage current of the first transistor is smaller than 1×

10<sup>−

14</sup> A.

4. The semiconductor device according to claim 1, wherein the first transistor comprises a channel formed in an oxide semiconductor layer.

5. The semiconductor device according to claim 1, wherein the first wiring is a wiring to which a reset signal is supplied.

6. The semiconductor device according to claim 1, wherein the second wiring is a wiring which is set at a constant potential as a reference potential.

7. The semiconductor device according to claim 1, wherein the third wiring is a wiring capable of setting the first electrode of the second capacitor at a constant potential.

8. The semiconductor device according to claim 1, wherein the fourth wiring is a wiring to which a reference potential for a source follower circuit including the second transistor is supplied.

9. The semiconductor device according to claim 1, wherein the fifth wiring is a wiring capable of selecting a pixel where an output signal is detected.

10. The semiconductor device according to claim 1, wherein the sixth wiring is a wiring capable of supplying a signal for controlling the first transistor.

11. The semiconductor device according to claim 1, wherein the seventh wiring is a wiring for transmitting an output signal.

2. A semiconductor device comprising:

a plurality of pixels arranged in a matrix, each of the plurality of pixels being electrically connected to first to eighth wirings and comprising;

a photodiode;

a first capacitor;

a second capacitor;

a first transistor;

a second transistor;

a third transistor;

a fourth transistor; and

a data holding portion,

wherein a cathode of the photodiode is electrically connected to the first wiring,

wherein an anode of the photodiode is electrically connected to one of a source and a drain of the fourth transistor,

wherein a gate of the fourth transistor is electrically connected to the eighth wiring,

wherein the other of the source and the drain of the fourth transistor is electrically connected to a first electrode of the first capacitor,

wherein a first electrode of the second capacitor is electrically connected to the third wiring,

wherein one of a source and a drain of the first transistor is electrically connected to the second wiring,

wherein a gate of the first transistor is electrically connected to the sixth wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the fourth wiring,

wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,

wherein the other of the source and the drain of the third transistor is electrically connected to the seventh wiring,

wherein a gate of the third transistor is electrically connected to the fifth wiring, and

wherein the data holding portion is configured by electrically connecting a second electrode of the first capacitor, a second electrode of the second capacitor, the other of the source and the drain of the first transistor, and a gate of the second transistor.

12. The semiconductor device according to claim 2, wherein a leakage current of the first transistor is smaller than 1×

10<sup>−

14</sup> A.

13. The semiconductor device according to claim 2, wherein the first transistor comprises a channel formed in an oxide semiconductor layer.

14. The semiconductor device according to claim 2, wherein the first wiring is a wiring to which a reset signal is supplied.

15. The semiconductor device according to claim 2, wherein the second wiring is a wiring which is set at a constant potential as a reference potential.

16. The semiconductor device according to claim 2, wherein the third wiring is a wiring capable of setting the first electrode of the second capacitor at a constant potential.

17. The semiconductor device according to claim 2, wherein the fourth wiring is a wiring to which a reference potential for a source follower circuit including the second transistor is supplied.

18. The semiconductor device according to claim 2, wherein the fifth wiring is a wiring capable of selecting a pixel where an output signal is detected.

19. The semiconductor device according to claim 2, wherein the sixth wiring is a wiring capable of supplying a signal for controlling the first transistor.

20. The semiconductor device according to claim 2, wherein the seventh wiring is a wiring for transmitting an output signal.

21. The semiconductor device according to claim 2, wherein the eighth wiring is a wiring capable of supplying a signal for controlling light exposure of a pixel.

22. A method for driving a semiconductor device comprising:

at least first to third operations in an operation of reading a data holding portion of a photodiode in a pixel,

wherein a potential of a first current generated by first light reception by the photodiode is read in the first operation,

wherein the potential of the first current from the photodiode is stored in the data holding portion in the second operation, and

wherein a combined potential of a potential of a second current generated by second light reception by the photodiode and an output potential based on the potential of the first current stored through the second operation is read in the third operation.

23. The method for driving the semiconductor device according to claim 22, wherein a transistor with small leakage current is used as a writing switch element for the data holding portion.

24. The method for driving the semiconductor device according to claim 23, wherein the leakage current of the transistor is smaller than 1×

10<sup>−

14</sup> A.

25. The method for driving the semiconductor device according to claim 23, wherein the transistor comprises a channel formed in an oxide semiconductor layer.