Guarded electrical overstress protection circuit
First Claim
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1. An electrical overstress protection circuit, comprising:
- a pair of clamp devices, having opposite polarity, connecting an input signal line to a common node; and
a second pair of clamp devices, each extending from the common node to a respective reference potential source,wherein the common node is at an externally-supplied constant reference voltage.
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Abstract
Disclosed embodiments are directed to an electrical overstress protection circuit. The electrical overstress protection circuit may include an intermediate node receiving a reference voltage, a first pair of clamp devices, having opposite polarity, clamping an input signal line to the intermediate node, and a second pair of clamp devices, each clamping the intermediate node to one of two reference potentials. The electrical overstress protection circuit may also include a filter connected to the intermediate node to reduce noise at the intermediate node.
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Citations
28 Claims
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1. An electrical overstress protection circuit, comprising:
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a pair of clamp devices, having opposite polarity, connecting an input signal line to a common node; and a second pair of clamp devices, each extending from the common node to a respective reference potential source, wherein the common node is at an externally-supplied constant reference voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 23)
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9. A data receiver including an electrical overstress protection circuit, comprising:
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an input signal line to receive an input data signal; and a clamp circuit receiving an externally-supplied constant reference voltage at an internal node, the clamp circuit comprising; a plurality of clamp devices clamping the input signal line to the internal node, a clamp device clamping the internal node to a first reference potential, and a clamp device clamping the internal node to a second reference potential. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. An overstress protection circuit for an input signal line of an integrated circuit, comprising:
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a two-stage clamping circuit coupling the input signal line to a pair of reference potential sources, a first stage of the clamping circuit extending from the input signal line to an internal node and a second stage of the clamping circuit extending from the internal node to at least one reference potential, and a signal source providing an externally-supplied constant reference voltage at the internal node. - View Dependent Claims (21, 22, 24, 25, 26, 27, 28)
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Specification