Power consumption reduction systems and methods

• US 8,839,006 B2
• Filed: 05/28/2010
• Issued: 09/16/2014
• Est. Priority Date: 05/28/2010
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Li, Sau Yan Keith, Dewey, Thomas Edward, Jamkar, Saket Arun, Parikh, Amit
• Primary Examiner(s): Elamin, M
• Application Number:
  US12/790,727
• Publication Number:
  US 20110291748A1
• Time in Patent Office: 1,572 Days
• Field of Search: 713/300, 713/310, 713320-324, 713/330, 713/340, 327/544
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

Power management systems and methods that facilitate efficient and effective power conservation are presented. In one embodiment a power management method comprises: performing an initiation metric determination process, and adjusting operations of a logic component based on said threshold value. In one exemplary implementation, the initiation metric determination process includes monitoring activity of a logic component, and establishing a power conservation initiation threshold value. The initiation metric determination process can include performing a system architecture characteristic analysis in which a system architecture power-consumption break-even time (BE) is determined for the system. The initiation metric determination process can also include performing a system utilization analysis process is performed in which idle period durations detected during said monitoring are sorted into a variety of different length intervals and analyzed accordingly. Histograms of idle period durations can be collected. Adjusting operations can include entering a low power state.

Claims

1. A power management method comprising:

performing an initiation metric determination process, wherein said initiation metric determination process includes;

performing an activity monitoring process;

performing, by a processor, a system architecture characteristic analysis in which a system architecture power-consumption break-even time (BE) is determined for the system;

establishing, by said processor, a power conservation initiation threshold value automatically; and

performing a power state adjustment process to an electronic system based on said threshold value.

2. The method of claim 1 wherein said adjusting operations comprises entering a low power state.

3. The method of claim 1 wherein said monitoring comprises collecting a histogram of previous idle period durations.

4. The method of claim 1 wherein said initiation metric determination process further comprises performing a system utilization analysis process in which idle period durations detected during said activity monitoring process are sorted into a variety of different length intervals and analyzed accordingly.

5. The method of claim 1 wherein said activity monitoring process includes tracking durations of component active operations and inactive operations.

6. The method of claim 1 further comprising suspending entrance of low power states when said activity monitoring process indicates an activity pattern is changing rapidly or erratically and entering the low power state is less likely to be successful.

7. A system of power management comprising:

a monitoring component that tracks power usage;

a threshold determining component, included in a processor, that establishes a threshold based on said power usage, wherein the threshold value includes examining the probability that initiating a power reduction operation saves more power than a power cost of entering and existing a power reduced state; and

a power control component that directs power consumption state adjustment of an electronic component based on said threshold.

8. The system of claim 7 wherein said power control component regulates power consumption by directing power-gating.

9. The system of claim 7 wherein said threshold determining component establishes said threshold such that time in a power reduction state conserves more power than is consumed entering said power reduction state.

10. The system of claim 7 wherein said threshold determining component comprises an idle detect counter that tracks respective idle period counts.

11. The system of claim 7 wherein said power control component directs power consumption state adjustment during a total idle time [I];

wherein said total idle time [I]=[X]+[Y1]+[P], wherein [X] is a duration in an inactive high power state, [Y1] is a duration while entering a low power state, and [P] is the duration at said low power level.

12. The system of claim 7 wherein an effective time at a low power level is determined based upon the equation [P′

]=[I]−

[X]−

[Y1]−

[BE], wherein [BE] is a break even time and [P′

] is a positive value.

13. The system of claim 12 wherein [Y1] and [BE] are characterized per system design and said threshold determining component calculates an idle filter setting associated with the idle start delay [X] for each total idle period [I].

14. A power management method comprising:

measuring idle of an electronic component;

binning said idle measurement, wherein said binning comprises counting idle periods that correspond to respective 2X clock cycles wherein X is a programmable number; and

automatically determining, by a processor, a threshold for said electronic component based on said binning.

15. The method of claim 14 further comprising setting a power level based on said threshold.

16. The method of claim 14 further comprising communicating said threshold to a power control component.

17. The method of claim 14 further comprising adjusting X based on clock frequency changes for different operating modes.