Three dimensional memory structure
DC CAFCFirst Claim
Patent Images
1. A circuit layer comprising:
- a semiconductor substrate that is of one piece and monocrystalline;
interconnect conductors passing vertically through the semiconductor substrate; and
silicon-based dielectric insulators passing vertically through the semiconductor substrate around the vertical interconnect conductors, the silicon-based dielectric insulators having a stress of less than 5×
108 dynes/cm2 tensile.
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Abstract
A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
395 Citations
138 Claims
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1. A circuit layer comprising:
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a semiconductor substrate that is of one piece and monocrystalline; interconnect conductors passing vertically through the semiconductor substrate; and silicon-based dielectric insulators passing vertically through the semiconductor substrate around the vertical interconnect conductors, the silicon-based dielectric insulators having a stress of less than 5×
108 dynes/cm2 tensile. - View Dependent Claims (2, 3, 4, 5, 6, 7, 31, 32, 33, 34, 35, 36, 37, 38, 39, 134)
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8. A substantially flexible circuit layer comprising:
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a monocrystalline semiconductor substrate of one piece that is formed from a semiconductor wafer and is thinned and substantially flexible; a silicon-based dielectric film on the semiconductor substrate, the silicon-based dielectric film having a stress of less than 5×
108 dynes/cm2 tensile;interconnect conductors passing vertically through the semiconductor substrate; and silicon-based dielectric insulators around the vertical interconnect conductors and passing vertically through the semiconductor substrate, the silicon-based dielectric insulators having a stress of less than 5×
108 dynes/cm2 tensile. - View Dependent Claims (9, 10, 11, 12, 13, 40, 41, 42, 43, 44, 45, 46, 47, 48, 131, 135, 138)
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14. A stacked substrate circuit layer structure comprising:
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a first circuit layer comprising at least one of contacts, interconnects, and circuitry; and a second circuit layer stacked with the first circuit layer, the second circuit layer comprising; a semiconductor substrate that is of one piece and is monocrystalline; at least one of contacts, interconnects, and circuitry integrated with the semiconductor substrate; interconnect conductors extending vertically through the semiconductor substrate and connected between the at least one of contacts, interconnects, and circuitry of the second circuit layer and the at least one of contacts, interconnects, and circuitry of the first circuit layer; and silicon-based dielectric insulators around the interconnect conductors and passing vertically through the semiconductor substrate, the silicon-based dielectric insulators having a stress of less than 5×
108 dynes/cm2 tensile. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 132, 136)
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23. An integrated circuit structure comprising:
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a first circuit layer comprising at least one of contacts, interconnects, and circuitry; and a second circuit layer stacked with the first circuit layer, the second circuit layer being substantially flexible and comprising; a monocrystalline semiconductor substrate of one piece that is formed from a semiconductor wafer and is thinned and substantially flexible; a silicon-based dielectric film on the semiconductor substrate and having a stress of less than 5×
108 dynes/cm2 tensile;at least one of contacts, interconnects, and circuitry integrated with the semiconductor substrate and the silicon-based dielectric film; interconnect conductors passing vertically through the semiconductor substrate and connected between the at least one of contacts, interconnects, and circuitry of the second circuit layer and the at least one of contacts, interconnects, and circuitry of the first circuit layer; and silicon-based dielectric insulators around the interconnect conductors and passing vertically through the semiconductor substrate, the silicon-based dielectric insulators having a stress of less than 5×
108 dynes/cm2 tensile. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88)
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89. A circuit layer comprising:
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a semiconductor substrate of one piece that is monocrystalline and substantially flexible; a silicon-based dielectric film with tensile low stress on the semiconductor substrate; interconnect conductors passing vertically through the semiconductor substrate; and silicon-based dielectric insulators with tensile low stress passing vertically through the semiconductor substrate around the vertical interconnect conductors; wherein the circuit layer is substantially flexible based on the silicon-based dielectric film having tensile low stress and the semiconductor substrate being substantially flexible. - View Dependent Claims (90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 130)
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103. An integrated circuit structure comprising:
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a first circuit layer comprising at least one of contacts, interconnects, and circuitry; and a second circuit layer stacked with the first circuit layer, the second circuit layer comprising; a monocrystalline semiconductor substrate of one piece that is formed from a semiconductor wafer and is substantially flexible; a silicon-based dielectric film with tensile low stress on the semiconductor substrate; at least one of contacts, interconnects, and circuitry integrated with the semiconductor substrate and the silicon-based dielectric film; interconnect conductors passing vertically through the semiconductor substrate and connected between the at least one of contacts, interconnects, and circuitry of the second circuit layer and the at least one of contacts, interconnects, and circuitry of the first circuit layer; and silicon-based dielectric insulators with tensile low stress passing vertically through the semiconductor substrate around the vertical interconnect conductors; wherein the circuit layer is substantially flexible based on the silicon-based dielectric film and the silicon-based dielectric insulators having tensile low stress and the semiconductor substrate being substantially flexible. - View Dependent Claims (104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 133, 137)
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Specification