Shunt regulator circuit having a split output

• US 8,841,890 B2
• Filed: 06/06/2012
• Issued: 09/23/2014
• Est. Priority Date: 06/10/2011
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Ochoa, Agustin, Tang, Howard
• Primary Examiner(s): Behm, Harry
• Assistant Examiner(s): Grubb, Matthew
• Application Number:
  US13/490,296
• Publication Number:
  US 20120313592A1
• Time in Patent Office: 839 Days
• Field of Search: 323/226, 323/269, 323/270, 323/273, 365/226
• US Class Current: 323/226
• CPC Class Codes: G05F 1/613 using semiconductor devices in parallel with the load as final control devices G05F1/461 takes precedence
• CPC Class Codes: G06K 19/0715 the arrangement including means to regulate power transfer to the integrated circuit

Abstract

A shunt regulator for an RFID tag chip is powered from split outputs from the RF rectifier, including a first output for providing a power delivery path to on-chip circuits and a second output for providing a discharge-regulation path. The shunt regulator includes a capacitor coupled between the first output and ground. The shunt regulator further includes an input node for receiving a power supply voltage from the rectifier split outputs, a first diode having an anode coupled to the input node, a second diode having an anode coupled to the input node, a resistor divider circuit and amplifier coupled between a cathode of the first diode and ground, transistor having a control terminal coupled to an output of the resistor divider and amplifier circuit, and a current path coupled between a cathode of the second diode and ground.

Claims

1. A shunt regulator powered from an RF rectifier block, the shunt regulator comprising:

an input node for receiving a power supply voltage from the RF rectifier block;

a first diode having an anode coupled to the input node;

a second diode having an anode coupled to the input node;

a resistor divider and amplifier circuit coupled between a cathode of the first diode and ground;

a transistor having a control terminal coupled to an output of the resistor divider and amplifier circuit, and a current path coupled between a cathode of the second diode and ground; and

a split output comprising a first output for providing a power delivery path to power RFID circuits including a FRAM memory circuit formed on-chip with the shunt regulator, and a second output for providing a discharge-regulation path to regulate power supply voltage from the RF rectifier block,

wherein the cathode of the first diode forms the first output of the split rectifier output and the cathode of the second diode forms the second output.

2. The shunt regulator of claim 1 further comprising a capacitor coupled between the first output and ground.

3. The shunt regulator of claim 1 wherein the resistor divider and amplifier circuit comprises:

a resistor divider coupled between the first output and ground;

an amplifier having a first input coupled to a reference voltage source, a second input coupled to a tap node of the resistor divider, and

an output coupled to the control terminal of the transistor.

4. The shunt regulator of claim 1 wherein the transistor comprises an MOS transistor.

5. The shunt regulator of claim 4 wherein the MOS transistor comprises a P-channel MOS transistor or an N-MOS transistor.

6. A shunt regulation method comprising;

providing a shunt regulator including;

a first diode having an anode coupled to am input node;

a second diode having an anode coupled to the input node;

a resistor divider and amplifier circuit coupled between a cathode of the first diode and ground; and

a transistor having a control terminal coupled to an output of the resistor divider circuit, and a current path coupled between a cathode of the second diode and ground; and

receiving on the input node of the shunt regulator a power supply voltage from a RF rectifier output;

providing on a first output of the shunt regulator a power delivery path to power RFID circuits including a FRAM memory circuit formed on-chip with the shunt regulator; and

providing on a second output of the shunt regulator a separate discharge-regulation path to regulate the power supply voltage from the RF rectifier block,

wherein the cathode of the first diode forms the first output of the split rectifier output and the cathode of the second diode forms the second output.

7. The shunt regulation method of claim 6 further comprising coupling a capacitor between the first output and ground.

8. The shunt regulation method of claim 6 further comprising:

coupling the resistor divider circuit to the first output; and

coupling the regulation transistor to the second output.

9. The shunt regulation method of claim 8 wherein the regulation transistor comprises an MOS transistor.

10. The shunt regulation method of claim 9 wherein the MOS transistor comprises a P-channel MOS transistor.

11. A shunt regulator for an RFID tag chip, the shunt regulator comprising:

an input node for receiving a power supply voltage from a rectifier output;

a first diode having an anode coupled to the input node;

a second diode having an anode coupled to the input node;

a resistor divider and amplifier circuit coupled between a cathode of the first diode and ground;

a transistor having a control terminal coupled to an output of the resistor divider circuit, and a current path coupled between a cathode of the second diode and ground; and

a split output comprising a first output for providing a power delivery path to power on-chip RFID circuits including a FRAM memory circuit, and a second output for providing a discharge-regulation path to regulate power supply voltage from the rectifier output,

wherein the cathode of the first diode forms the first output of the split output RF rectifier circuit and the cathode of the second diode forms the second output.

12. The shunt regulator of claim 11 wherein the on-chip circuits include I/O circuitry, analog circuitry and digital circuitry.

13. The shunt regulator of claim 11 further comprising a capacitor coupled between the first output and ground.

14. The shunt regulator of claim 11 wherein the resistor divider and amplifier circuit comprises:

a resistor divider coupled between the first output and ground; and

an amplifier having a first input coupled to a reference voltage source, a second input coupled to a tap node of the resistor divider, and an output coupled to the control terminal of the transistor.

15. The shunt regulator of claim 11 wherein the transistor comprises an MOS transistor.

16. The shunt regulator of claim 15 wherein the MOS transistor comprises a P-channel or an N-channel MOS transistor.