Liquid crystal display device

• US 8,842,230 B2
• Filed: 06/04/2013
• Issued: 09/23/2014
• Est. Priority Date: 07/06/2007
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Suzuki, Yukie, Kuwabara, Hideaki, Kimura, Hajime
• Primary Examiner(s): KIANNI, KAVEH C
• Application Number:
  US13/909,398
• Publication Number:
  US 20130265518A1
• Time in Patent Office: 476 Days
• Field of Search: 349/42, 349/43, 257/E51.005, 257/E29.151, 345/92, 438/149, 438/142
• US Class Current: 349/43
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

Claims

1. A liquid crystal display device comprising;

a substrate,

a transistor over the substrate, the transistor comprising a gate electrode, a gate insulating layer over the gate electrode, a first semiconductor layer over the gate insulating layer, a source region and a drain region over the first semiconductor layer, a source electrode over the source region and a drain electrode over the drain region;

a first electrode over the substrate;

an insulating layer over the first electrode and the transistor; and

a second electrode over the insulating layer and connected to one of the source electrode and the drain electrode,

wherein the source region and the drain region comprise a semiconductor layer including an impurity element imparting one conductivity type and comprising a microcrystalline semiconductor,

wherein the second electrode has a first slit and a second slit and overlaps with the first electrode,

wherein the first slit extends in a different direction from which the second slit extends,

wherein the source and drain regions extend beyond outer side edges of the source and drain electrodes,

wherein a thickness of a first portion of the first semiconductor layer between the source region and the drain region is smaller than a second portion of the first semiconductor layer, and

wherein the first semiconductor layer extends beyond outer side edges of the source and drain regions.

2. The liquid crystal display device according to claim 1, wherein the first electrode does not overlap with a channel formation region of the transistor.

3. The liquid crystal display device according to claim 1, wherein the first electrode is covered by the gate insulating layer.

4. The liquid crystal display device according to claim 1, wherein the gate electrode is overlapped with a first color layer, a second color layer, a third color layer, a light shielding film, and a projection.

5. The liquid crystal display device according to claim 1, further comprising:

a third electrode between the first electrode and the insulating layer; and

a second semiconductor layer between the first electrode and the third electrode;

wherein a capacitor is formed by the first electrode, the gate insulating layer, the second semiconductor layer and the third electrode.

6. A liquid crystal display device comprising;

a substrate,

a transistor over the substrate, the transistor comprising a gate electrode, a gate insulating layer over the gate electrode, a first semiconductor layer over the gate insulating layer, a source region and a drain region over the first semiconductor layer, a source electrode over the source region and a drain electrode over the drain region;

a first electrode over the substrate;

an insulating layer over and in contact with the first electrode and the transistor; and

a second electrode over and in contact with the insulating layer and connected to one of the source electrode and the drain electrode through the insulating layer,

wherein the gate electrode is overlapped with a first color layer, a second color layer, a third color layer, a light shielding film, and a spacer,

wherein the source region and the drain region comprise a semiconductor layer including an impurity element imparting one conductivity type and comprising a microcrystalline semiconductor,

wherein the second electrode has a slit,

wherein the source and drain regions extend beyond outer side edges of the source and drain electrodes,

wherein a thickness of a first portion of the first semiconductor layer between the source region and the drain region is smaller than a second portion of the first semiconductor layer, and

wherein the first semiconductor layer extends beyond outer side edges of the source and drain regions.

7. The liquid crystal display device according to claim 6, wherein the first electrode does not overlap with a channel formation region of the transistor.

8. The liquid crystal display device according to claim 6, wherein the first electrode is covered by the gate insulating layer.

9. The liquid crystal display device according to claim 6, further comprising:

a third electrode between the first electrode and the insulating layer; and

a second semiconductor layer between the first electrode and the third electrode;

wherein a capacitor is formed by the first electrode, the gate insulating layer, the second semiconductor layer and the third electrode.