Highly optimized digital IQ transmitter chain

• US 8,842,777 B2
• Filed: 06/28/2012
• Issued: 09/23/2014
• Est. Priority Date: 03/07/2008
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Mobile Communications GmbH (Intel Corporation)
• Inventors: van Waasen, Stefan
• Primary Examiner(s): NEFF, MICHAEL R
• Application Number:
  US13/535,827
• Publication Number:
  US 20120263260A1
• Time in Patent Office: 817 Days
• Field of Search: 375/316, 375/340, 375/144
• US Class Current: 375/316
• CPC Class Codes: H03C 1/36 by means of semiconductor device having at least three electrodes H03C1/34, H03C1/50, H03C1/52, H03C1/62 take precedence
• CPC Class Codes: H03C 3/40 using two signal paths the outputs of which have a predetermined phase difference and at least one output being amplitude-modulated
• CPC Class Codes: H03C 5/00 Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal H03C7/00 takes precedence
• CPC Class Codes: H03D 2200/0052 Digital to analog conversion
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002

Abstract

Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is the mixed with an in-phase or quadrature carrier signal under the influence of the digital sign signal and routed to a driver output stage.

Claims

1. An electronic circuit, comprising:

first circuitry configured to separate a first digital modulation signal into a first digital sign signal and a first digital magnitude signal;

a first digital-to-analog converter configured to convert the first digital magnitude signal into a first analog magnitude signal;

a first mixer configured to mix the first analog magnitude signal with the first digital sign signal and a first analog carrier signal to generate a first mixed signal.

2. The electronic circuit of claim 1, further comprising:

second circuitry configured to separate a second digital modulation signal into a second digital sign signal and a second digital magnitude signal;

a second digital-to-analog converter configured to convert the second digital magnitude signal into a second analog magnitude signal; and

a second mixer configured to mix the second analog magnitude signal with the second digital sign signal and a second analog carrier signal to generate a second mixed signal,

wherein the first digital modulation signal comprises one of an in-phase digital modulation signal and a quadrature digital modulation signal, and the second digital modulation signal comprises the other of the in-phase digital modulation signal and the quadrature digital modulation signal.

3. The electronic circuit according to claim 2, further comprising an in-phase-and-quadrature (IQ) generator configured to derive the first analog carrier signal and the second analog carrier signal comprising an in-phase analog carrier signal and a quadrature analog carrier signal, respectively, from a local oscillator signal.

4. The electronic circuit according to claim 3, wherein the local oscillator signal corresponds to a carrier signal.

5. The electronic circuit according to claim 2, further comprising adder circuitry configured to sum the first mixed signal and the second mixed signal to provide a summation signal.

6. The electronic circuit according to claim 5, wherein the driver circuit is further configured to power amplify the summation signal to derive an output signal.

7. The electronic circuit according to claim 1, further comprising a first multiplexer configured to receive the first digital magnitude signal, and a first signal associated with the first digital sign signal, and output a first multi-state switching signal that corresponds to a predetermined function of the first digital magnitude signal and the first signal associated with the first digital sign signal.

8. The electronic circuit of claim 7, wherein the first signal associated with the first digital sign signal comprises an inverted form of the first digital sign signal.

9. The electronic circuit of claim 8, wherein the first multiplexer further receives a first reference signal, wherein the first multi-state switching signal further corresponds to a predetermined function of the first digital magnitude signal, the inverted form of the first digital sign signal and a first reference signal.

10. An apparatus comprising a signal processor configured to couple to an antenna, the signal processor comprising:

a separating component configured to separate a digital modulation signal into a digital sign signal and a digital magnitude signal;

a conversion component configured to convert the digital magnitude signal into an analog magnitude signal using a plurality of current sources that are selectively switchable in accordance with a multi-state switching signal, wherein the multi-state switching signal is a function of the digital magnitude signal; and

a mixer configured to mix at least the analog magnitude signal and the digital sign signal to derive a mixed signal.

11. The apparatus of claim 10, wherein the multi-state switching signal is further a function of a signal associated with the digital sign signal.

12. The apparatus of claim 11, wherein the multi-state switching signal further corresponds to a predetermined function of the digital magnitude signal, an inverted form of the digital sign signal and a reference signal.

13. The apparatus of claim 10, further comprising:

an adder configured to sum the mixed signal with at least one other signal to derive a summation signal; and

a driver configured to amplify the summation signal to derive an output signal, the output signal configured to be provided to the antenna.

14. A method, comprising:

separating a digital modulation signal into a digital sign signal and a digital magnitude signal;

converting the digital magnitude signal to an analog magnitude signal;

mixing at least the analog magnitude signal, an analog carrier signal, and the digital sign signal to derive a mixed signal.

15. The method of claim 14, further comprising:

multiplexing the digital sign signal with at least one other signal to derive a multiplexed signal; and

converting the digital magnitude signal to an analog magnitude signal using the multiplexed signal.

16. The method according to claim 14, wherein the digital modulation signal is further defined as a digital in-phase modulation signal, the method further comprising:

separating a digital quadrature modulation signal into another digital sign signal and another digital magnitude signal;

converting the another digital magnitude signal to another analog magnitude signal; and

mixing at least the another analog magnitude signal and the another digital sign signal to derive another mixed signal.

17. The method according to claim 16, further comprising summing the mixed signal and the another mixed signal to derive a summation signal.

18. The method according to claim 17, wherein amplifying the mixed signal comprises:

power amplifying the summation signal to derive the output signal; and

providing the output signal to at least one antenna.

19. The method according to claim 16, further comprising:

generating, responsive to a carrier input signal, an in-phase carrier signal and a quadrature carrier signal, the difference between the in-phase carrier signal and the quadrature carrier signal defining an analog differential signal; and

mixing the analog magnitude signal and the digital sign signal with at least one of the in-phase carrier signal or the quadrature carrier signal or the analog differential signal to derive the mixed signal.

20. The method according to claim 14, further comprising:

performing the converting of the digital magnitude signal to the analog magnitude signal by way of a plurality of current sources selectively switchable in accordance with a multi-state switching signal.

21. An electronic circuit, comprising:

a digital-to-analog converter, the digital-to-analog converter configured to convert a digital magnitude signal derived from a digital modulation signal into an analog magnitude signal responsive to a multi-state switching signal;

a mixer, the mixer coupled to receive signals from the digital-to-analog converter and the mixer configured to mix at least a digital sign signal derived from the digital modulation signal with the analog magnitude signal, responsive to an in-phase or quadrature signal to produce a mixed signal that is provided to a pair of output nodes; and

a multiplexer configured to receive the digital magnitude signal and an inverted form of the digital sign signal and a logic reference signal and derive the multi-state switching signal there from.