Semiconductor device and data processing system using the same

• US 8,847,353 B2
• Filed: 12/19/2011
• Issued: 09/30/2014
• Est. Priority Date: 12/20/2010
• Status: Active Grant

• Current Assignee: Longitude Licensing Limited (Vector Capital Corporation)
• Original Assignee: PS4 Luxco S.a.r.l.
• Inventors: Hasunuma, Eiji
• Primary Examiner(s): Diallo, Mamadou
• Assistant Examiner(s): Chang, Jay C
• Application Number:
  US13/329,650
• Publication Number:
  US 20120153436A1
• Time in Patent Office: 1,016 Days
• Field of Search: 257/532, 257/306, 257/E29.342, 438/381, 438/386, 438/396, 438/393, 438/303, 438/301
• US Class Current: 257/532
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 28/91 made by depositing layers, e.g. by depositing alternating conductive and insulating layers
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/09 with simultaneous manufacture of the peripheral circuit region and memory cells
• CPC Class Codes: H10B 12/318 the storage electrode having multiple segments
• CPC Class Codes: H10B 12/50 Peripheral circuit region structures

Abstract

Capacitance blocks (first block and second block) respectively formed on two different adjacent common pad electrodes are electrically connected in series through an upper electrode. A distance between two adjacent capacitance blocks connected in series through an upper electrode film for the upper electrode corresponds to a distance between opposing lower electrodes disposed in an outermost perimeter of each capacitance block, and is two or less times than a total film thickness of the upper electrode film embedded between the two adjacent capacitance blocks.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate including a memory cell region and a peripheral circuit region;

a plurality of memory cells each including a cell transistor and a cell capacitor and formed over the memory cell region of the semiconductor substrate;

first and second capacitor blocks formed over the peripheral circuit region of the semiconductor substrate apart from each other,

the first capacitor block comprising;

a first common electrode,

a plurality of first lower electrodes each including a first bottom portion and a first crown-shape portion projecting from a periphery of the first bottom portion, the first bottom portion including a first front surface and a first back surface, the first crown-shape portion including a first inner surface and a first outer surface, each of the first lower electrodes being in electrical contact at the first back surface of the first bottom portion with the first common electrode,

a first dielectric film formed on the first front surface of the first bottom portion and each of the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes, and

a first upper electrode formed on the first dielectric film to cover the first front surface of the first bottom portion and the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes with an intervention of the first dielectric film;

the second capacitor block comprising;

a second common electrode,

a plurality of second lower electrodes each including a second bottom portion and a second crown-shape portion projecting from a periphery of the second bottom portion, the second bottom portion including a second front surface and a second back surface, the second crown-shape portion including a second inner surface and a second outer surface, each of the second lower electrodes being in electrical contact at the second back surface of the second bottom portion with the second common electrode,

a second dielectric film formed on the second front surface of the second bottom portion and the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes, and

a second upper electrode formed on the second dielectric film to cover the second front surface of the second bottom portion and the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes with an intervention of the second dielectric film;

a first support film disposed between one of the first outer surfaces of one of the first lower electrodes and one of the first outer surfaces of another adjacent first lower electrode in order to prevent the first lower electrodes from collapsing; and

a second support film disposed between one of the second outer surfaces of one of the second lower electrodes and one of the second outer surfaces of another adjacent second lower electrode in order to prevent the second lower electrodes from collapsing,

wherein the first upper electrode of the first capacitor block and the second upper electrode are continuously elongated in parallel to the substrate to merge in one body as a first common upper electrode.

2. The device as claimed in claim 1,

wherein the first common electrode is elongated over the semiconductor substrate to provide a first elongated portion and the second common electrode is elongated over the substrate to provide a second elongated portion, and

wherein the device further comprises an interlayer insulating film covering the first and second upper electrodes and the first and second elongated portions, and first and second vias selectively formed in the interlayer insulating film to be connected to the first and second elongated portions, respectively.

3. The device as claimed in claim 1, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are continuously elongated to merge in one body.

4. The device as claimed in claim 1, wherein the cell capacitor comprises:

a third lower electrode including a third bottom portion and a third crown-shape portion projecting from a periphery of the third bottom portion, the third bottom portion including a third front surface and a third back surface, the third crown-shape portion including a third inner surface and a third outer surface, the third lower electrode being in electrical contact at the third back surface of the third bottom portion with the cell transistor,

a third dielectric film formed on the third front surface of the third bottom portion and each of the third inner and third outer surfaces of the third crown-shape portion of the third lower electrode, and

a third upper electrode formed on the third dielectric film to cover the third front surface of the third bottom portion and the third inner and third outer surfaces of the third crown-shape portion of the third lower electrode with an intervention of the third dielectric film.

12. The device as claimed in claim 4, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are continuously elongated to merge with each other as a first common dielectric film, the third dielectric film of one of the cell capacitors merging with the third dielectric film of each of remaining ones of the cell capacitors as a second common dielectric film, the third upper electrode of the one of the cell capacitors merging with the third upper electrode of each of the remaining ones of the call capacitors as a second common upper electrode, the first and second common dielectric films being separated from each other, and the first and second common upper electrodes being separated from each other.

13. The device as claimed in claim 1, further comprising a third capacitor block formed over the peripheral circuit region of the semiconductor substrate apart from each of the first and second capacitor blocks, the third capacitor block comprising:

a plurality of third lower electrodes each including a third bottom portion and a third crown-shape portion projecting from a periphery of the third bottom portion, the third bottom portion including a third front surface and a third back surface, the third crown-shape portion including a third inner surface and a third outer surface, each of the third lower electrodes being in electrical contact at the third back surface of the third bottom portion with the second common electrode,

a third dielectric film formed on the third front surface of the third bottom portion and each of the third inner and third outer surfaces of the third crown-shape portion of each of the third lower electrodes, and

a third upper electrode formed on the third dielectric film to cover the third front surface of the third bottom portion and the third inner and third outer surfaces of the third crown-shape portion of each of the third lower electrodes with an intervention of the third dielectric film, the third upper electrode of the third capacitor block being separated from each of the first and second upper electrodes.

14. The device as claimed in claim 13, further comprising a first terminal electrode provided in an electrical contact with the first common electrode and a second terminal electrode provided in an electrical contact with the third upper electrode so that the first, second and third capacitor blocks are electrically connected in series with one another between the first and second terminal electrodes.

15. The device as claimed in claim 13, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are continuously elongated to merge in one body, and the third dielectric film is separated from each of the first and second dielectric films.

27. The device as claimed in claim 1, wherein only the first support film and the second support film support the first lower electrodes and the second lower electrodes, respectively, and prevent the first lower electrodes and the second lower electrodes from collapsing, free of a guard ring region.

5. A semiconductor device, comprising:

first and second capacitor blocks formed over a substrate apart from each other,

the first capacitor block comprising;

a first common electrode,

a plurality of first lower electrodes each including a first bottom portion and a first crown-shape portion projecting from a periphery of the first bottom portion, the first bottom portion including a first front surface and a first back surface, the first crown-shape portion including a first inner surface and a first outer surface, each of the first lower electrodes being in electrical contact at the first back surface of the first bottom portion with the first common electrode,

a first dielectric film formed on the first front surface of the first bottom portion and each of the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes, and

a first upper electrode formed on the first dielectric film to cover the first front surface of the first bottom portion and the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes with an intervention of the first dielectric film;

the second capacitor block comprising;

a second common electrode,

a plurality of second lower electrodes each including a second bottom portion and a second crown-shape portion projecting from a periphery of the second bottom portion, the second bottom portion including a second front surface and a second back surface, the second crown-shape portion including a second inner surface and a second outer surface, each of the second lower electrodes being in electrical contact at the second back surface of the second bottom portion with the second common electrode,

a second dielectric film formed on the second front surface of the second bottom portion and the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes, and

a second upper electrode formed on the second dielectric film to cover the second front surface of the second bottom portion and the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes with an intervention of the second dielectric film, the first upper electrode of the first capacitor block and the second upper electrode being continuously elongated in parallel to the substrate to merge in one body as a first common upper electrode;

a first support film disposed between one of the first outer surfaces of one of the first lower electrodes and one of the first outer surfaces of another adjacent first lower electrode in order to prevent the first lower electrodes from collapsing;

a second support film disposed between one of the second outer surfaces of one of the second lower electrodes and one of the second outer surfaces of another adjacent second lower electrode in order to prevent the second lower electrodes from collapsing; and

a plurality of memory cells each including a cell transistor and the cell capacitor, the cell capacitor comprising;

a third lower electrode including a third bottom portion and a third crown-shape portion projecting from a periphery of the third bottom portion, the third bottom portion including a third front surface and a third back surface, the third crown-shape portion including a third inner surface and a third outer surface, the third lower electrode being in electrical contact at the third back surface of the third bottom portion with the cell transistor,

a third dielectric film formed on the third front surface of the third bottom portion and each of the third inner and third outer surfaces of the third crown-shape portion of the third lower electrode, and

a third upper electrode formed on the third dielectric film to cover the third front surface of the third bottom portion and the third inner and third outer surfaces of the third crown-shape portion of the third lower electrode with an intervention of the third dielectric film,

wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are continuously elongated to merge with each other as a first common dielectric film, the third dielectric film of one of the cell capacitors merging with the third dielectric film of each of remaining ones of the cell capacitors as a second common dielectric film, the third upper electrode of the one of the cell capacitors merging with the third upper electrode of each of the remaining ones of the cell capacitors as a second common upper electrode, the first and second common dielectric films being separated from each other, and the first and second common upper electrodes being separated from each other.

16. The device as claimed in claim 5, wherein the first common electrode is elongated over the substrate to provide a first elongated portion and the second common electrode is elongated over the substrate to provide a second elongated portion, and

wherein the device further comprises an interlayer insulating film covering the first and second upper electrodes and the first and second elongated portions, and first and second vias selectively formed in the interlayer insulating film to be connected to the first and second elongated portions, respectively.

17. The device as claimed in claim 5, wherein further comprising a third capacitor block, comprising:

a plurality of fourth lower electrodes each including a fourth bottom portion and a fourth crown-shape portion projecting from a periphery of the fourth bottom portion, the fourth bottom portion including a fourth front surface and a fourth back surface, the fourth crown-shape portion including a fourth inner surface and a fourth outer surface, each of the fourth lower electrodes being in electrical contact at the fourth back surface of the fourth bottom portion with the second common electrode,

a fourth dielectric film formed on the fourth front surface of the fourth bottom portion and the fourth inner and fourth outer surfaces of the fourth crown-shape portion of each of the fourth lower electrodes, and

a fourth upper electrode formed on the fourth dielectric film to cover the fourth front surface of the fourth bottom portion and the fourth inner and fourth outer surfaces of the fourth crown-shape portion of each of the fourth lower electrodes with an intervention of the fourth dielectric film; and

wherein the fourth upper electrode of the third capacitor block is separated from each of the first upper electrode of the first capacitor block and the second upper electrode of the second capacitor block.

18. The device as claimed in claim 17, wherein the third dielectric film is separated from each of the first and second common dielectric films.

19. The device as claimed in claim 17, wherein the first, second and third capacitor blocks are connected in series with one another between the first common electrode and the fourth upper electrode.

6. A semiconductor device comprising:

a semiconductor substrate including a memory cell region and a peripheral circuit region;

a plurality of memory cells each including a cell transistor and a cell capacitor and formed over the memory cell region of the semiconductor substrate;

first and second conductors formed over the peripheral circuit region of the semiconductor substrate apart from each other;

a plurality of first crown-shape conductors each projecting from the first conductor and including a first inner surface and a first outer surface, the first crown-shape conductors being electrically connected with each other through the first conductor;

a plurality of second crown-shape conductors each projecting from the second conductor and including a second inner surface and a second outer surface, the second crown-shape conductors being electrically connected with each other through the second conductor;

a first dielectric film formed on the first inner surface and the first outer surface of each of the first crown-shape conductors;

a second dielectric film formed on the second inner surface and the second outer surface of each of the second crown-shape conductors;

a common conductor including first, second and third portions that merge in one body, the third portion being between the first and second portions, the first portion filling inside and outside of each of the first crown-shape conductors to cover the first inner surface and the first outer surface of each of the first crown-shape conductors with an intervention of the first dielectric film, the second portion filling inside and outside of each of the second crown-shape conductors to cover the second inner surface and the second outer surface of each of the second crown-shape conductors with an intervention of the second dielectric film, the first, second and third portions including a first substantially even upper surface, a second substantially even upper surface and a third substantially even upper surface, respectively, and the first substantially even upper surface, the second substantially even upper surface and the third substantially even upper surface being substantially coplanar with one another;

a first support film disposed between one of the first outer surfaces of one of the first lower electrodes and one of the first outer surfaces of another adjacent first lower electrode in order to prevent the first lower electrodes from collapsing; and

a second support film disposed between one of the second outer surfaces of one of the second lower electrodes and one of the second outer surfaces of another adjacent second lower electrode in order to prevent the second lower electrodes from collapsing.

7. The device as claimed in claim 6, wherein each of the first, second and third portions of the common conductor comprises a metal layer and a semiconductor layer formed on the metal layer, each of the metal layers of the first and second portions being between an associated one of the first and second dielectric films and the semiconductor layer.

8. The device as claimed in claim 7, wherein the common conductor further comprises an additional metal layer formed on the semiconductor layer of each of the first, second and third portions.

9. The device as claimed in claim 7, wherein the semiconductor layer of each of the first, second and third portions constitutes an associated one of the first, second and third substantially even upper surfaces.

10. The device as claimed in claim 9, wherein common conductor further comprises an additional metal layer formed on first, second and third substantially even upper surfaces of the first, second and third portions.

11. The device as claimed in claim 6, wherein the first and second dielectric films merge in one body as a common dielectric film.

20. A semiconductor device, comprising:

a first capacitor block including first and second terminals and a plurality of first capacitors that are connected in parallel to each other between the first and second terminals; and

a second capacitor block including third and fourth terminals and a plurality of second capacitors that are connected in parallel to each other between the third and fourth terminals, the third terminal being connected to the second terminal so that the first and second capacitor blocks are connected in series with each other between the first and fourth terminals,

wherein the first capacitor block comprises;

a first common conductor serving as the first terminal,

a plurality of first lower electrodes serving as lower electrodes of the first capacitors, respectively, each of the first lower electrodes including a first bottom portion and a first crown-shape portion projecting from a periphery of the first bottom portion, the first bottom portion including a first front surface and a first back surface, the first crown-shape portion including a first inner surface and a first outer surface, each of the first lower electrodes being in electrical contact at the first back surface of the first bottom portion with the first common conductor,

a first dielectric film formed continuously on the first front surface of the first bottom portion and each of the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes,

a first upper electrode formed continuously on the first dielectric film to cover the first front surface of the first bottom portion and the first inner and first outer surfaces of the first crown-shape portion of each of the first lower electrodes with an intervention of the first dielectric film, the first upper electrode being used in common as upper electrodes of the first capacitors and serving as the second terminal, and

a first support film disposed between one of the first outer surfaces of one of the first lower electrodes and one of the first outer surfaces of another adjacent first lower electrode in order to prevent the first lower electrodes from collapsing,

wherein the second capacitor block comprises;

a second common conductor serving as the fourth terminal,

a plurality of second lower electrodes serving as lower electrodes of the second capacitors, respectively, each of the second lower electrodes including a second bottom portion and a second crown-shape portion projecting from a periphery of the second bottom portion, the second bottom portion including a second front surface and a second back surface, the second crown-shape portion including a second inner surface and a second outer surface, each of the second lower electrodes being in electrical contact at the second back surface of the second bottom portion with the second common conductor,

a second dielectric film formed continuously on the second front surface of the second bottom portion and each of the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes,

a second upper electrode formed continuously on the second dielectric film to cover the second front surface of the second bottom portion and the second inner and second outer surfaces of the second crown-shape portion of each of the second lower electrodes with an intervention of the second dielectric film, the second upper electrode being used in common as upper electrodes of the second capacitors and serving as the third terminal, and

a second support film disposed between one of the second outer surfaces of one of the second lower electrodes and one of the second outer surfaces of another adjacent second lower electrode in order to prevent the second lower electrodes from collapsing,

wherein the first upper electrode of the first capacitor block and the second upper electrode of the second capacitor block are elongated to merge in one body to connect the second terminal of the first capacitor block and the third terminal of the second capacitor block with each other.

21. The device as claimed in claim 20, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are elongated to merge in one body.

22. The device as claimed in claim 20, further comprising:

a third capacitor block including a fifth terminal and a plurality of third capacitors that are connected in parallel to each other between the fourth and fifth terminals, the first, second and third capacitor blocks being connected in series with each other between the first and fifth terminals, and the third capacitor block comprising;

a plurality of third lower electrodes serving as lower electrodes of the third capacitors, respectively, each of the third lower electrodes including a third bottom portion and a third crown-shape portion projecting from a periphery of the third bottom portion, the third bottom portion including a third front surface and a third back surface, the third crown-shape portion including a third inner surface and a third outer surface, each of the third lower electrodes being in electrical contact at the third back surface of the third bottom portion with the second common conductor,

a third dielectric film formed continuously on the third front surface of the third bottom portion and each of the third inner and third outer surfaces of the third crown-shape portion of each of the third lower electrodes, and

a third upper electrode formed continuously on the third dielectric film to cover the third front surface of the third bottom portion and the third inner and third outer surfaces of the third crown-shape portion of each of the third lower electrodes with an intervention of the third dielectric film, the third upper electrode being used in common as upper electrodes of the third capacitors and being separated from each of the first and second upper electrodes to serve as the fifth terminal.

23. The device as claimed in claim 22, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are elongated to merge in one body, and the third dielectric film is separated from each of the first and second dielectric films.

24. The device as claimed in claim 20, further comprising a plurality of memory cells each including a cell transistor and a cell capacitor, the memory cells being disposed adjacently to one another to provide a memory cell array region, and each of the first and second capacitor blocks being disposed apart from the memory cell array region.

25. The device as claimed in claim 24, wherein the first dielectric film of the first capacitor block and the second dielectric film of the second capacitor block are elongated to merge in one body to provide a first common dielectric film, and a dielectric film of one of the cell capacitors merges with a dielectric film of each of remaining ones of the cell capacitors to provide a second common dielectric film, the first common dielectric film is separated from the second dielectric film.

26. The device as claimed in claim 25, wherein an upper electrode of the one of the cell capacitors merges with an upper electrode of each of the remaining ones of the cell capacitors to provide a cell plate electrode, the cell plate electrode being separated from each of the first and second upper electrodes.