Optimization methodology and apparatus for wide-swing current mirror with wide current range
First Claim
1. A current mirror circuit, comprising:
- a first transistor having a drain terminal coupled to a gate terminal thereof, and configured to conduct a bias current therethrough;
a second transistor and a third transistor connected together in series, the third transistor having a drain terminal connected to a gate terminal of the second transistor, the third transistor is connected to the gate terminal of the first transistor, and wherein the second and third transistors are configured to conduct an operational current therethrough;
a first current source circuit coupled to the drain terminal of the first transistor, wherein the first current source circuit is configured to vary the bias current over a range of currents in a first manner; and
a second current source circuit coupled to the drain terminal of the third transistor, wherein the second current source circuit is configured to vary the operational current over a range of currents in a second manner that is different than the first manner.
1 Assignment
0 Petitions
Accused Products
Abstract
A current mirror circuit includes an input portion configured to conduct a bias current, and a first current source circuit coupled to the input portion and configured to generate the bias current, and vary the bias current over a range of currents based on a first group of weightings associated therewith. The current mirror circuit also includes an output portion configured to conduct an operational current, wherein the output portion is coupled to the input portion, and a second current source circuit coupled to the output portion and configured to generate the operational current, and vary the operational current over a range of currents based on a second group of weightings associated therewith. The first group of weightings and the second group of weightings are different.
-
Citations
20 Claims
-
1. A current mirror circuit, comprising:
-
a first transistor having a drain terminal coupled to a gate terminal thereof, and configured to conduct a bias current therethrough; a second transistor and a third transistor connected together in series, the third transistor having a drain terminal connected to a gate terminal of the second transistor, the third transistor is connected to the gate terminal of the first transistor, and wherein the second and third transistors are configured to conduct an operational current therethrough; a first current source circuit coupled to the drain terminal of the first transistor, wherein the first current source circuit is configured to vary the bias current over a range of currents in a first manner; and a second current source circuit coupled to the drain terminal of the third transistor, wherein the second current source circuit is configured to vary the operational current over a range of currents in a second manner that is different than the first manner. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 17)
-
-
11. A method of optimizing a current mirror circuit for operation over a range of currents, comprising:
-
determining a desired operating current range; simulating operation of the current mirror circuit over the desired operating current range; ascertaining whether an active device in the current mirror circuit is in a saturation mode of operation over the desired operating current range in the simulated operation; and altering a weighting of a first current source circuit or a second current source circuit, or both, that reside in the current mirror circuit if the active device is not in the saturation mode of operation over the desired operating current range. - View Dependent Claims (12, 13, 14, 15, 16, 18, 19, 20)
-
Specification