Analog circuits having improved transistors, and methods therefor
First Claim
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1. A circuit, comprising:
- a plurality of transistors having controllable current paths configured to generate an electrical output signal in response to an input signal;
wherein a particular transistor of the plurality of transistors has an undoped channel region formed over a doped first layer formed over a highly doped second layer formed over a doped body region;
wherein the particular transistor has a bias line coupled to the doped body region, the bias line operable to receive a forward bias voltage to lower a threshold voltage of the particular transistor.
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Abstract
Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.
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19 Claims
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1. A circuit, comprising:
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a plurality of transistors having controllable current paths configured to generate an electrical output signal in response to an input signal; wherein a particular transistor of the plurality of transistors has an undoped channel region formed over a doped first layer formed over a highly doped second layer formed over a doped body region; wherein the particular transistor has a bias line coupled to the doped body region, the bias line operable to receive a forward bias voltage to lower a threshold voltage of the particular transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification