Variable resistance memory device and data storage device including the same
First Claim
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1. A variable resistance memory device, comprising:
- memory cells arranged at a region where word lines and bit lines cross each other;
control logic configured to generate a command flag indicative of a program operation mode in response to a program command provided from an external device and configured to control a program operation of the memory cells based on the command flag; and
a write driver configured to be activated in response to the flag command and configured to supply a program current to the memory cells.
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Abstract
A variable resistance memory device includes memory cells arranged at a region where word lines and bit lines cross each other, control logic configured to generate a command flag indicative of a program operation mode in response to a program command provided from an external device and configured to control the program operation of the memory cells based on the command flag and a write driver configured to be activated in response to the flag command and configured to supply a program current to the memory cells.
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Citations
20 Claims
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1. A variable resistance memory device, comprising:
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memory cells arranged at a region where word lines and bit lines cross each other; control logic configured to generate a command flag indicative of a program operation mode in response to a program command provided from an external device and configured to control a program operation of the memory cells based on the command flag; and a write driver configured to be activated in response to the flag command and configured to supply a program current to the memory cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A data storage device, comprising:
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a variable resistance memory device; and a controller configured to control the variable resistance memory device, wherein the variable resistance memory device comprises; memory cells arranged at a region where word lines and bit lines cross each other; control logic configured to generate a command flag indicative of a program operation mode in response to a program command provided from the controller and configured to control a program operation of the memory cells based on the command flag; and a write driver configured to be activated in response to the flag command and configured to supply a program current to the memory cells. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification