Integrated circuit for signal analysis

• US 8,849,213 B2
• Filed: 11/23/2009
• Issued: 09/30/2014
• Est. Priority Date: 01/21/2009
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Bandspeed, Inc. (Broadcom, Inc.)
• Inventors: Jones, Ben William, Mammoser, Douglas A., Morton, John M., Bagge, Nils, Bhulani, Bhavin, Wingert, Matthew P., Killian, Harrison J.
• Primary Examiner(s): Sorowar, Golam
• Application Number:
  US12/623,598
• Publication Number:
  US 20100184384A1
• Time in Patent Office: 1,772 Days
• Field of Search: 455/67.11, 455/161.1, 455/434, 455/418, 455/422.1, 375/224, 375/130, 375/147, 375/354, 375/232, 375/219, 375/225, 375/267, 375/340, 370/208, 370/210, 370/211, 370/480, 370/510
• US Class Current: 455/67.11
• CPC Class Codes: H04B 17/318 Received signal strength

Abstract

An integrated circuit comprises a main bus, one or more integrated processors, an external bus interface, memory, internal bus controller, a signal analyzer, timers, reset/clock generator, radio controller, optional data converters, and optional radio. The signal analyzer performs both time-domain and frequency-domain analysis of the input signal and supplies data to the one or more integrated processors for signal classification.

Claims

1. An integrated circuit, comprising:

a bus;

one or more integrated processors connected to the bus; and

a signal analyzer connected to the bus, the signal analyzer including a time-domain analyzer that provides time-domain data that indicates time-domain characteristics of signals and a frequency-domain analyzer that provides frequency-domain data that indicates frequency-domain characteristics of the signals,

wherein the one or more integrated processors cause adaptive scanning to be performed on two or more communications channels based upon at least the time-domain data provided by the time-domain analyzer and the frequency-domain data provided by the frequency-domain analyzer, wherein the adaptive scanning includes one or more of increasing a dwell time for at least one communications channel from the two or more communications channels or changing a scanning sequence for the two or more communications channels.

2. The integrated circuit of claim 1, wherein the time-domain analyzer includes one or more programmable correlators to compare a signal input to the time-domain analyzer to one or more signal protocol patterns.

3. The integrated circuit of claim 2, wherein control of the signal analyzer is based at least in part on output of the programmable correlators.

4. The integrated circuit of claim 1, wherein the one or more integrated processors control a scanning operation to locate a signal of interest, and once located, classify the located signal of interest.

5. The integrated circuit of claim 1, wherein the time-domain analyzer determines a first feature vector based at least in part on a signal input to the time-domain analyzer, the first feature vector including one or more of:

pulse width, pulse time of arrival, pulse repetition interval, received signal power, and correlation of the signal input to the time-domain analyzer with respect to one or more signal protocol patterns.

6. The integrated circuit of claim 1, wherein the frequency-domain analyzer determines a second feature vector based at least in part on a signal input to the frequency-domain analyzer, the second feature vector including one or more of:

max hold spectrum, decimated spectrum, peak magnitude level, peak magnitude frequency, and bandwidth.

7. The integrated circuit of claim 1, wherein the adaptive scanning includes decreasing a dwell time for one or more other communications channels from the two or more communications channels.

8. The integrated circuit of claim 1, wherein changing a scanning sequence for the two or more communications channels includes for a particular scanning sequence of the two or more communications channels scanning a particular communications channel a greater number of times than one or more other communications channels in the two or more communications channels.

9. The integrated circuit of claim 1, wherein the adaptive scanning includes one or more of changing a scanning bandwidth or changing a segmentation of the bandwidth into communications channels.

10. The integrated circuit of claim 1, wherein the one or more integrated processors causing adaptive scanning to be performed includes generating and transmitting one or more control signals to a signal sensor.

11. An integrated circuit, comprising:

a bus;

means for processing; and

means for performing signal analysis connected to the bus, the means for performing signal analysis including means for performing time-domain analysis that provides time-domain data that indicates time-domain characteristics of signals and means for performing frequency-domain analysis that provides frequency-domain data that indicates frequency-domain characteristics of the

wherein the means for processing causes adaptive scanning to be performed on two or more communications channels based upon at least the time-domain data provided by the means for performing time-domain analysis and the frequency-domain data provided by the means for performing frequency-domain analysis, wherein the adaptive scanning includes one or more of increasing a dwell time for at least one communications channel from the two or more communications channels or changing a scanning sequence for the two or more communications channels.

12. The integrated circuit of claim 11, wherein the means for performing time-domain analysis includes correlation means to compare a signal input to the means for performing time-domain analysis to one or more signal protocol patterns.

13. The integrated circuit of claim 12, wherein control of the means for performing signal analysis is based at least in part on output of the correlation means.

14. The integrated circuit of claim 11, wherein the means for processing control a scanning operation to locate a signal of interest, and once located, classify the located signal of interest.

15. The integrated circuit of claim 11, wherein the means for performing time-domain analysis determines a first feature vector based at least in part on a signal input to the means for performing time-domain analysis, the first feature vector including one or more of:

pulse width, pulse time of arrival, pulse repetition interval, received signal power, and correlation of the signal input to means for performing time-domain analysis with respect to one or more signal protocol patterns.

16. The integrated circuit of claim 11, wherein the means for performing frequency-domain analysis determines a second feature vector based at least in part on a signal input to the means for performing frequency-domain analysis, the second feature vector including one or more of:

max hold spectrum, decimated spectrum, peak magnitude level, peak magnitude frequency, and bandwidth.

17. The integrated circuit of claim 11, wherein the adaptive scanning includes decreasing a dwell time for one or more other communications channels from the two or more communications channels.

18. The integrated circuit of claim 11, wherein changing a scanning sequence for the two or more communications channels includes for a particular scanning sequence of the two or more communications channels scanning a particular communications channel a greater number of times than one or more other communications channels in the two or more communications channels.

19. The integrated circuit of claim 11, wherein the adaptive scanning includes one or more of changing a scanning bandwidth or changing a segmentation of the bandwidth into communications channels.

20. The integrated circuit of claim 11, wherein the means for processing causing adaptive scanning to be performed includes generating and transmitting one or more control signals to a signal sensor.