Method for protecting a cryptographic module and a device having cryptographic module protection capabilities

• US 8,850,232 B2
• Filed: 03/19/2008
• Issued: 09/30/2014
• Est. Priority Date: 03/19/2008
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Priel, Michael, Ashkenazi, Asaf, Kuzmin, Dan, Rozen, Anton
• Primary Examiner(s): MOORTHY, ARAVIND K
• Application Number:
  US12/919,541
• Publication Number:
  US 20100332851A1
• Time in Patent Office: 2,386 Days
• Field of Search: 713/189, 713/193, 713/194, 726/34
• US Class Current: 713/193
• CPC Class Codes: G06F 21/554 involving event detection and direct action
• CPC Class Codes: G06F 21/755 with measures against power attack
• CPC Class Codes: G06F 21/86 Secure or tamper-resistant housings

Abstract

A device and a method for protecting a cryptographic module of which the method includes: estimating a functionality of a circuit that is adapted to malfunction when a physical parameter has a first value different from a nominal parameter value at which the cryptographic module functions correctly. The cryptographic module malfunctions when the physical parameter has a second value different from the nominal parameter value and a difference between the first value and the nominal parameter value being smaller than a difference between the second value and the nominal parameter value. A cryptographic module protective measure is applied if estimating that the circuit malfunctions.

Claims

1. A method for protecting a cryptographic module, the method comprising:

estimating a functionality of a circuit that is adapted to malfunction when a physical parameter has a first value different from a nominal parameter value at which the cryptographic module functions correctly, the cryptographic module malfunctioning when said physical parameter has a second value different from said nominal parameter value and a difference between said first value and said nominal parameter value being smaller than a difference between said second value and said nominal parameter value, wherein said circuit is provided with a supply voltage of a first level and a clock signal that has a frequency that exceeds a first frequency threshold, wherein the cryptographic module is adapted to malfunction when being provided with a supply voltage of the first level and a clock signal that has a frequency that exceeds a second frequency threshold, wherein the second frequency threshold is higher than the first frequency threshold, wherein the first frequency threshold is higher than a nominal operational frequency of the cryptographic module when provided with a supply voltage of the first level; and

applying a cryptographic module protective measure if estimating that the circuit malfunctions.

2. The method according to claim 1, wherein the applying comprises erasing an encryption key that is utilized by the cryptographic module if estimating that the circuit malfunctions.

3. The method according to claim 1, wherein the applying comprises generating an alert.

4. The method according to claim 1, wherein the estimating comprises evaluating a progress of a signal through at least a portion of the circuit.

5. The method according to claim 1, wherein the clock signal provided to the circuit has a frequency that is lower than a frequency of a clock signal provided to at least one other component of an integrated circuit that comprises the cryptographic module.

6. The method according to claim 1, comprising applying a cryptographic module protective measure if either one of the following conditions is fulfilled:

(i) a level of a supply voltage is outside an allowed supply voltage level range; and

(ii) a monitored temperature is outside an allowed temperature range.

7. The method according to claim 1, comprising providing a circuit that resembles a critical path of the cryptographic module but malfunctions at lower frequencies than the critical path of the cryptographic module.

8. The method according to claim 7 comprising measuring a delay of the circuit in relation to a cycle of a clock signal that is provided to the circuit.

9. A computer program product stored on a nontransitory computer readable storage medium, the computer program product including code portions for performing a method as claimed in claim 1 when run on a programmable apparatus.

10. A device having cryptographic module protection capabilities, the device comprises:

a circuit;

a cryptographic module; and

a monitor;

wherein the circuit malfunctions when a physical parameter has a first value different from a nominal parameter value at which the cryptographic module functions correctly, the cryptographic module malfunctions when said physical parameter has a second value different from said nominal parameter value, a difference between said first value and said nominal parameter value being smaller than a difference between said second value and said nominal parameter value, wherein the circuit malfunctions when being provided with a supply voltage of a first level and a clock signal that has a frequency that exceeds a first frequency threshold, wherein the cryptographic module is adapted to malfunction when being provided with a supply voltage of the first level and a clock signal that has a frequency that exceeds a second frequency threshold, wherein the second frequency threshold is higher than the first frequency threshold, wherein the first frequency threshold is higher than a nominal operational frequency of the cryptographic module when provided with a supply voltage of the first level;

wherein the monitor estimates a functionality of the circuit and participates in an appliance of a cryptographic module protective measure if estimating that the circuit malfunctions.

11. The device according to claim 10, wherein the device erases an encryption key that is utilized by the cryptographic module if the monitor estimates that the circuit malfunctions.

12. The device according to claim 10, wherein the device erases an encryption key that is utilized by the cryptographic module if the monitor estimates that the circuit malfunctions.

13. The device according to claim 10, wherein device generates an alert if the monitor estimates that the circuit malfunctions.

14. The device according to claim 10, wherein the monitor evaluates a progress of a signal through at least a portion of the circuit.

15. The device according to claim 10, wherein the clock signal provided to the circuit has a frequency that is lower than a frequency of a clock signal provided to at least one other component of an integrated circuit that comprises the cryptographic module.

16. The device according to claim 10, adapted to apply a cryptographic module protective measure if either one of the following conditions is fulfilled:

a level of a supply voltage is outside an allowed supply voltage level range; and

a monitored temperature is outside an allowed temperature range.

17. The device according to claim 10, wherein the circuit resembles a critical path of the cryptographic module but malfunctions at lower frequencies than the critical path of the cryptographic module.

18. The device according to claim 10, wherein the monitor measures a delay of the circuit in relation to a cycle of a clock signal that is provided to the circuit.