Technique for forming a MEMS device

• US 8,852,984 B1
• Filed: 03/30/2011
• Issued: 10/07/2014
• Est. Priority Date: 03/30/2011
• Status: Active Grant

• Current Assignee: Semiconductor Manufacturing International Corporation
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Quevy, Emmanuel P., Gu, Zhen, Low, Carrie W., Hui, Jeremy Ryan
• Primary Examiner(s): MULPURI, SAVITRI
• Application Number:
  US13/075,800
• Time in Patent Office: 1,287 Days
• Field of Search: 438 48- 53, 216/2, 257414-417
• US Class Current: 438/50
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2201/0242 Gyroscopes
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81B 3/0062 Devices moving in two or more dimensions, i.e. having special features which allow movement in more than one dimension
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: G01C 19/5712 the devices involving a micromechanical structure

Abstract

In at least one embodiment of the invention, a method of manufacturing an integrated circuit including a microelectromechanical system (MEMS) device includes forming a first structural layer above at least one semiconductor device formed on a substrate. The method includes forming a second structural layer above the first structural layer. The second structural layer has a thickness substantially greater than a thickness of the first structural layer. The MEMS device comprises at least one portion of at least one of the first and second structural layers. In at least one embodiment of the invention, the method is carried out at one or more temperatures less than a tolerable threshold temperature for the at least one semiconductor device.

Claims

1. A method of manufacturing an integrated circuit including a microelectromechanical system (MEMS) device comprising:

forming a first structural layer above at least one semiconductor device formed on a substrate; and

forming a second structural layer above the first structural layer, the second structural layer having a thickness at least two times greater than a thickness of the first structural layer,

wherein the MEMS device comprises a portion formed in the second structural layer that increases the mass of a member of the MEMS device formed by a portion of the first structural layer.

2. The method, as recited in claim 1, wherein the method is carried out at one or more temperatures less than a tolerable threshold temperature for the at least one semiconductor device.

3. The method, as recited in claim 1, comprising:

forming a first release layer below the first structural layer;

forming a second release layer above the first structural layer; and

removing portions of the first and second release layers to form the MEMS device.

4. The method, as recited in claim 3, further comprising:

forming a third release layer above the second release layer to form a stack of release material; and

removing portions of the third release layer prior to the removing portions of the first and second release layers.

5. The method, as recited in claim 1, wherein the portion of the first structural layer is in electrical contact with the portion of the second structural layer.

6. The method, as recited in claim 1, wherein the portion of the first structural layer and the portion of the second structural layer are each operative to move in a first direction and a second direction orthogonal to the first direction.

7. The method, as recited in claim 1, wherein the thickness of the second structural layer is at at least five times the thickness of the first structural layer.

8. The method, as recited in claim 7, further comprising:

forming a gap between a first portion of the second structural layer and a second portion of the second structural layer, the gap having a width at least one order of magnitude less than the thickness of the second structural layer.

9. The method, as recited in claim 8, wherein the first and second portions of the second structural layer form electrically isolated, electrostatically coupled portions of the MEMS device.

10. The method, as recited in claim 8, wherein an electrode of the MEMS device comprises the first portion of the second structural layer and a member of the MEMS device comprises the second portion of the second structural layer.

11. The method, as recited in claim 10, wherein the member is a mass of an inertial sensor.

12. The method, as recited in claim 11, wherein a first portion of the first structural layer forms an anchor for the mass and is electrically coupled to the mass.

13. The method, as recited in claim 1, further comprising:

forming at least one electrical contact to a semiconductor device of the at least one semiconductor device; and

forming at least one interconnect structure coupled to the at least one semiconductor device, and the portion of the first structural layer and the portion of the second structural layer.

17. The method, as recited in claim 1, wherein the thickness of the second structural layer is two to five times the thickness of the first structural layer.

14. A method of manufacturing an integrated circuit including a microelectromechanical system (MEMS) device comprising:

forming a first structural layer above at least one semiconductor device formed on a substrate; and

forming a second structural layer above the first structural layer, the second structural layer having a thickness greater than a thickness of the first structural layer,

wherein forming the second structural layer comprises forming a plurality of layers of a first material, wherein the MEMS device comprises a portion formed in the second structural layer that increases the mass of a member of the MEMS device formed by a portion of the first structural layer.

15. The method, as recited in claim 14, wherein forming the plurality of layers of the first material comprises:

patterning at least one of the plurality of layers to form at least one patterned layer; and

forming an additional layer of the first material on the at least one patterned layer conforming to the at least one patterned layer.

16. The method, as recited in claim 14, wherein forming the plurality of layers comprises:

forming a first layer of the plurality of layers; and

interrupting an interface of the first layer prior to forming a second layer of the plurality of layers above the first layer.

18. The method, as recited in claim 14, wherein the second structural layer has a thickness in a range of two to five times the thickness of the first structural layer.

19. The method, as recited in claim 14, wherein the thickness of the second structural layer is at least two times the thickness of the first structural layer.

20. The method, as recited in claim 14, wherein the thickness of the second structural layer is at least five times the thickness of the first structural layer.

21. The method, as recited in 1, wherein the portion of the first structural layer and a portion of the second structural layer form a proof mass of the MEMS device.

22. The method, as recited in 21, wherein the portion of first structural layer is in direct contact with the portion of the second structural layer.

23. The method, as recited in 14, wherein the portion of the first structural layer and a portion of the second structural layer form a proof mass of the MEMS device.

24. The method, as recited in 23, wherein the portion of first structural layer is in direct contact with the portion of the second structural layer.