Light emitting regions for use with light emitting devices

• US 8,853,668 B2
• Filed: 09/29/2011
• Issued: 10/07/2014
• Est. Priority Date: 09/29/2011
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ramer, Jeff, Ting, Steve
• Primary Examiner(s): NGUYEN, THANH T
• Application Number:
  US13/249,146
• Publication Number:
  US 20130082236A1
• Time in Patent Office: 1,104 Days
• Field of Search: 257 13- 15
• US Class Current: 257/13
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

A light emitting device comprises a first layer having an n-type Group III-V semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more V-pits at a density between about 1 V-pit/μm² and 30 V-pits/μm². The light emitting device includes a third layer adjacent to the second layer, the third layer comprising a p-type Group III-V semiconductor.

Claims

1. A light emitting diode (LED), comprising:

a first layer comprising an n-type Group III-V semiconductor;

a second layer adjacent to the first layer, the second layer comprising an active layer that generates light upon the recombination of electrons and holes and has a thickness between 50 nm and 200 nm;

a third layer adjacent to the second layer, the third layer comprising a p-type Group III-V semiconductor; and

a silicon substrate adjacent to one of either the first layer or the third layer,

wherein the active layer comprises one or more V-pits having one or more openings at an interface between the active layer and the third layer, the V-pits having a density between about 10 V-pits/μ

m² and 20 V-pits/μ

m² at the interface and a density between about 10% and 20% of a surface coverage of the interface.

2. The LED of claim 1, wherein the active layer has a dislocation density between about 1×

10⁸ cm<sup>−

2</sup> and 5 ×

10⁹ cm<sup>−

2</sup>.

3. The LED of claim 1, wherein the n-type Group III-V semiconductor comprises n-type gallium nitride and the p-type Group III-V semiconductor comprises p-type gallium nitride.

4. The LED of claim 1, wherein the LED has an external quantum efficiency of at least about 50%.

5. The LED of claim 1, wherein the n-type Group III-V semiconductor is an n-type gallium nitride (GaN) layer, and the V-pits are formed on or around defects in the n-type GaN layer.

6. A light emitting diode (LED), comprising:

a first layer having an n-type Group III-V semiconductor;

a second layer adjacent to the first layer, the second layer having an active layer that generates light upon the recombination of electrons and holes and has a thickness between 50 nm and 200 nm, the second layer having one or more V-pits at a density between about 10% and 20% of a surface coverage of the second layer and at a density between about 10 V-pits/μ

m² and 20 V-pits/μ

m² at a surface of the second layer; and

a third layer adjacent to the second layer, the third layer having a p-type Group III-V semiconductor.

7. The LED of claim 6, further comprising a substrate adjacent to the first layer or third layer.

8. The LED of claim 7, wherein the substrate is formed of silicon or sapphire.

9. The LED of claim 6, wherein the LED has an external quantum efficiency of at least about 50%.

10. The LED of claim 6, wherein the n-type Group III-V semiconductor comprises n-type gallium nitride and the p-type Group III-V semiconductor comprises p-type gallium nitride.

11. The LED of claim 6, wherein the active layer comprises a plurality of quantum wells.

12. The LED of claim 6, wherein the active layer comprises alternating gallium nitride and indium gallium nitride or indium aluminum gallium nitride thin films.

14. The LED of claim 7, wherein the n-type Group III-V semiconductor is an n-type gallium nitride (GaN) layer, and the V-pits are formed on or around defects in the n-type GaN layer.

13. The LED of claim , wherein the active material layer has a dislocation density between about 1 ×

10 ⁸ cm<sup>−

2</sup> and 5×

0⁹ cm<sup>−

2</sup>.

15. A light emitting diode (LED), comprising:

an n-type gallium nitride (GaN) layer;

a p-type GaN layer; and

an active layer that is formed between the n-type GaN layer and the p-type GaN layer and has a thickness between 50 nm and 200 nm, the active layer comprising one or more V-pits having one or more openings at an interface between the active layer and the n-type GaN layer or the p-type GaN layer, the one or more openings consuming between about 10% and 20 % of the interface,

wherein the active layer includes the one or more openings at a density between about 10 V-pits/μ

m² and 20 V-pits/μ

m² at the interface.

16. The LED of claim 15, further comprising a substrate adjacent to the n-type GaN layer or p-type GaN layer.

17. The LED of claim 16, wherein the substrate is formed of silicon or sapphire.

18. The LED of claim 15, wherein the active layer comprises one or more quantum well stacks, an individual stack comprising a barrier layer and a well layer adjacent to the barrier layer.

19. The LED of claim 15, wherein the active layer includes a plurality of periods, and wherein at least one period of the plurality of periods includes indium gallium nitride layer or indium aluminum gallium nitride.

20. The LED of claim 19, wherein the at least one period of the plurality of periods includes gallium nitride.

21. The LED of claim 15, wherein said interface is between the active layer and the p-type GaN layer.

22. The LED of claim 15, wherein the active layer has a dislocation density between about 1 ×

10 ⁸ cm<sup>−

2</sup> and 5×

10⁹ cm<sup>−

2</sup>.

23. The LED of claim 15, wherein the V-pits are formed on or around defects in the n-type GaN layer.

28. The LED of claim 22, wherein the light emitting material layer has a dislocation density between about 1 ×

10 ⁸ cm<sup>−

2</sup> and 5×

10⁹ cm<sup>−

2</sup>.

24. An active layer for use in a light emitting diode (LED), comprising a light emitting layer having a thickness between 50 nm and 200 nm and one or more V-pits at coverage between about 10% and 20% of a surface,

wherein the light emitting layer includes the one or more V-pits at a density between about 10 V-pits/μ

m<sup>−

2</sup> and 20 V-pits/μ

m² at the surface.

25. The active layer of claim 24, wherein the active layer has an external quantum efficiency of at least about 50%.

26. The active layer of claim 24, wherein the active layer comprises a well layer and a barrier adjacent to the well layer.

27. The active layer of claim 26, further comprising i) an additional barrier layer adjacent to the well layer, or ii) an additional well layer adjacent to the barrier layer.