System, structure, and method of manufacturing a semiconductor substrate stack
First Claim
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1. An integrated circuit comprising:
- a substrate having an active region formed in a top surface of the substrate;
a plurality of vias, each extending through the substrate, each having a first termination substantially aligned with a bottom surface of the substrate and a second termination substantially aligned to the top surface of the substrate;
wherein each first termination of the plurality of vias terminate on a common plane at the bottom surface and are electrically insulated from one another;
a first conductive contact electrically connected to the second termination of at least one of the vias and electrically connected to a conductive interconnect layer;
a first bonding joint connected to the second termination of the via and extending above a topmost insulator of the substrate, wherein there is no semiconductor substrate between the top surface of the substrate and the first bonding joint; and
a second conductive contact electrically connected to the conductive interconnect layer and the active region.
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Abstract
A method of manufacturing a semiconductor substrate structure for use in a semiconductor substrate stack system is presented. The method includes a semiconductor substrate which includes a front-face, a backside, a bulk layer, an interconnect layer that includes a plurality of inter-metal dielectric layers sandwiched between conductive layers, a contact layer that is between the bulk layer and the interconnect layer, and a TSV structure commencing between the bulk layer and the contact layer and terminating at the backside of the substrate. The TSV structure is electrically coupled to the interconnect layer and the TSV structure is electrically coupled to a bonding pad on the backside.
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Citations
30 Claims
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1. An integrated circuit comprising:
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a substrate having an active region formed in a top surface of the substrate; a plurality of vias, each extending through the substrate, each having a first termination substantially aligned with a bottom surface of the substrate and a second termination substantially aligned to the top surface of the substrate; wherein each first termination of the plurality of vias terminate on a common plane at the bottom surface and are electrically insulated from one another; a first conductive contact electrically connected to the second termination of at least one of the vias and electrically connected to a conductive interconnect layer; a first bonding joint connected to the second termination of the via and extending above a topmost insulator of the substrate, wherein there is no semiconductor substrate between the top surface of the substrate and the first bonding joint; and a second conductive contact electrically connected to the conductive interconnect layer and the active region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A semiconductor substrate structure, the structure comprising:
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a backside; a front-face; a bulk layer; an interconnect layer, wherein the interconnect layer includes a plurality of conductive layers sandwiched between inter-metal dielectric layers, the plurality of conductive layers being parallel to the front face; a contact layer, wherein the contact layer is between the bulk layer and the interconnect layer; a first through substrate via (TSV) commencing between the bulk layer and the contact layer and terminating at the backside of the bulk layer, wherein the first TSV is electrically coupled to the interconnect layer, and wherein the first TSV is electrically coupled to the backside; a bonding region on the front-face, wherein the interconnect layer is between the bonding region and the first TSV and wherein the bonding region extends beyond a topmost surface of a topmost insulator on the front face, wherein there is no semiconductor substrate between the front face and the bonding region; and a second TSV commencing between the bulk layer and the contact layer and terminating at the backside of the bulk layer, wherein the second TSV is electrically isolated from the first TSV. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A system of stacked semiconductor substrates, the system comprising:
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a first substrate including; a backside; a front-face; a bulk layer, wherein the bulk layer comprises a semiconductor material; a contact layer, wherein the contact layer is between the bulk layer and an interconnect layer; wherein the interconnect layer includes a plurality of inter-metal dielectric layers sandwiched between a plurality of conductive layers, the plurality of inter-metal dielectric layers and plurality of conductive layers being parallel to the front-face, and wherein the interconnect layer does not contain a semiconductor substrate; a plurality of lined TSVs commencing between the contact layer and terminating at the backside, wherein each lined TSV is electrically coupled to the interconnect layer and wherein each lined TSV is electrically coupled to a bonding pad on the backside, and further wherein each lined TSV is electrically isolated from an adjacent TSV; and a bonding joint, wherein the bonding joint is on the front-face and is electrically and physically connected to the interconnect layer and further wherein the bonding joint extends beyond a top surface of a topmost insulator layer on the front face; and a second substrate bonded to the first substrate at the bonding joint. - View Dependent Claims (19, 20, 21)
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22. A semiconductor device comprising:
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a first substrate comprising; a bulk semiconductor layer having a top surface and a bottom surface; an active region formed in the top surface of the bulk semiconductor layer; a first TSV extending through the bulk semiconductor layer; a second TSV extending through the bulk semiconductor layer, wherein the first and second TSVs each have a first termination at the top surface of the bulk semiconductor layer and a second termination at the bottom surface of the bulk semiconductor layer, and wherein the first TSV is electrically isolated from the second TSV; a first conductive contact electrically and physically connected to the first termination of the first TSV; and a second conductive contact electrically and physically connected to the active region; an interconnect layer comprising a plurality of inter-metal dielectric layers sandwiched between a plurality of conductive layers, wherein the first and second conductive contacts are electrically and physically connected to the interconnect layer, and wherein the interconnect layer does not contain a semiconductor substrate; and a first bonding joint electrically and physically connected to the interconnect layer and electrically connected to the first TSV, the first bonding joint extending beyond a top surface of a topmost insulator layer of the interconnect layer. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30)
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Specification