Apparatus and method for obtaining EEG data

• US 8,855,758 B2
• Filed: 08/02/2007
• Issued: 10/07/2014
• Est. Priority Date: 08/03/2006
• Status: Expired due to Fees

• Current Assignee: Imperial Innovations Limited (Imperial College London)
• Original Assignee: Imperial Innovations Limited (Imperial College London)
• Inventors: Yates, David C., Rodriquez-Villegas, Esther O.
• Primary Examiner(s): Matthews, Christine
• Assistant Examiner(s): Reddy, Sunita
• Application Number:
  US12/375,765
• Publication Number:
  US 20090312664A1
• Time in Patent Office: 2,623 Days
• Field of Search: 600/383, 600509-523, 600302-308, 600345-371, 600481-507, 600529-545
• US Class Current: 600/544
• CPC Class Codes: A61B 5/0002 Remote monitoring of patients using telemetry, e.g. transmission of vital signals via a communication network A61B5/07 takes precedence; transmission systems for measured values G08C; transmission H04B; transmission of digital information H04L; wireless communication networks H04W
• CPC Class Codes: A61B 5/369 Electroencephalography [EEG] devices for psychotechnics A61B5/16
• CPC Class Codes: A61B 5/4094 Diagnosing or monitoring seizure diseases, e.g. epilepsy
• CPC Class Codes: A61B 5/7232 involving compression of the physiological signal, e.g. to extend the signal recording period
• CPC Class Codes: A61B 5/726 using Wavelet transforms
• CPC Class Codes: H03F 2200/375 Circuitry to compensate the offset being present in an amplifier
• CPC Class Codes: H03F 2203/45044 One or more switches are opened or closed to balance the dif amp to reduce the offset of the dif amp
• CPC Class Codes: H03F 3/45995 using switching means

Abstract

An apparatus for obtaining EEG data includes a signal processing component for receiving EEG signals from each of a plurality of electrodes and a data output component. The signal processing component is arranged to convert respective EEG signals in real time to a reduced data set and provide the reduced data set to the data output component.

Claims

1. An apparatus for obtaining EEG data comprising:

a signal processing component that receives one or more EEG signals from each of a plurality of electrodes; and

a data output component,

the signal processing component converting respective EEG signals in real time to a reduced data set and providing the reduced data set to the data output component,

wherein the signal processing component recognizes a part of the received one or more EEG signals corresponding to one or more EEG signal profiles of an expected EEG feature and provides a section of data corresponding to the recognized part to the data output component,

wherein the signal processing component includes a voltage offset removal component that removes voltage offset to reduce a number of bits of the data set,

wherein the voltage offset removal component comprises an analogue component,

wherein the analogue component comprises an analogue chopper amplifier,

wherein the analogue chopper amplifier comprises sequentially an input chopper switch circuit stage, an amplifier stage and an output chopper switch circuit stage,

wherein an effective resistance and input capacitance of the input chopper switch circuit stage and an input capacitance of the amplifier stage are configured to form a high pass filter, and

wherein the amplifier stage includes a CMOS component in weak inversion.

2. The apparatus of claim 1, wherein the apparatus is mountable on a wearer'"'"'s head.

3. The apparatus of claim 1, wherein the signal processing component comprises a feature extraction component.

4. The apparatus of claim 3, wherein the feature extraction component is arranged to identify peak filter outputs and identify a corresponding input signal feature for extraction.

5. The apparatus of claim 3, wherein the feature extraction component is at least partially analogue.

6. The apparatus of claim 3, wherein the feature extraction component is configured to execute one or more local feature extraction algorithms, and wherein the one or more local feature extraction algorithms extract one or more EEG signals corresponding to the one or more EEG signal profiles.

7. The apparatus of claim 3, wherein the feature extraction component comprises a filter having an impulse response corresponding to the one or more EEG signal profiles.

8. The apparatus of claim 7, wherein the impulse response is configured to perform a wavelet transform for a mother wavelet corresponding to the one or more EEG signal profiles.

9. The apparatus of claim 7, wherein the filter having an impulse response corresponding to the one or more EEG signal profiles comprises an analogue filter.

10. The apparatus of claim 9, wherein the analogue filter having an impulse response corresponding to the one or more EEG signal profiles is implemented on a chip.

11. The apparatus of claim 9, wherein the analogue filter having an impulse response corresponding to the one or more EEG signal profiles operates at about 1.4 μ

W.

12. The apparatus of claim 3, wherein the feature extraction component is configured to identify and discard EEG data which fall below a detection threshold.

13. The apparatus of claim 12, wherein the detection threshold is predetermined.

14. The apparatus of claim 1, wherein the reduced data set comprises discarded EEG data that does not correspond to the one or more EEG signal profiles.

15. The apparatus of claim 1, further comprising a base station comprising a screen display, the reduced data set being viewable on the screen display.

16. The apparatus of claim 1, wherein the one or more EEG profiles indicates an epileptic event or a cognitive state selected from the group consisting of fatigue, drowsiness, stress, workload, memory, attention and sleep stage.

17. An apparatus for obtaining EEG signals and reducing a number of bits per EEG signal comprising:

a voltage offset removal component comprising an analogue chopper amplifier that comprises sequentially an input capacitor, an input chopper switch circuit stage and an amplifier stage, wherein parasitic capacitance at an input of the amplifier stage and the input chopper switch circuit stage switches to form an effective resistance such that when combined with input capacitance a high pass filter is formed with a cut-off frequency of less than about 0.5 Hz.