On chip inductor with frequency dependent inductance

• US 8,859,300 B2
• Filed: 01/10/2013
• Issued: 10/14/2014
• Est. Priority Date: 03/18/2009
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Ding, Hanyi, Woods, Wayne H. Jr.
• Primary Examiner(s): Lebentritt, Michael
• Application Number:
  US13/738,367
• Publication Number:
  US 20130125079A1
• Time in Patent Office: 642 Days
• Field of Search: 438 12- 15
• US Class Current: 438/12
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/394 Routing G06F30/396 takes precedence
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H01L 21/31053 involving a dielectric removal step
• CPC Class Codes: H01L 21/76808 involving intermediate temporary filling with material
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 29/432 Heterojunction gate for field effect devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

A set of metal line structures including a signal transmission metal line and a capacitively-grounded inductively-signal-coupled metal line is embedded in a dielectric material layer. A capacitor is serially connected between the capacitively-grounded inductively-signal-coupled metal line and a local electrical ground, which may be on the input side or on the output side. The set of metal line structures and the capacitor collective provide a frequency dependent inductor. The Q factor of the frequency dependent inductor has multiple peaks that enable the operation of the frequency dependent inductor at multiple frequencies. Multiple capacitively-grounded inductively-signal-coupled metal lines may be provided in the frequency-dependent inductor, each of which is connected to the local electrical ground through a capacitor. By selecting different capacitance values for the capacitors, multiple values of the Q-factor may be obtained in the frequency dependent inductor at different signal frequencies.

Claims

1. A non-transitory machine readable medium embodying a set of encoded instructions for generating, when executed or processed on a machine, a representation of hardware components of a semiconductor structure, said representation comprising:

a first element representing a signal transmission line having a self-inductance;

a second element representing a first device including a first signal input node directly connected to a first end of said signal transmission line and a second signal input node directly connected to electrical ground;

a third element representing a second device including a first signal output node directly connected to a second end of said signal transmission line and a second signal output node directly connected to electrical ground;

a fourth element representing an inductive circuit element having a mutual inductance with said signal transmission line through inductive coupling; and

a fifth element representing a capacitor having a first capacitor node and a second capacitor node, wherein said first capacitor node is directly connected to an end of said inductive circuit element, and wherein said second capacitor node is electrically grounded.

2. The non-transitory machine readable medium of claim 1, wherein said first device is a signal transmitting device and said second device is a signal receiving device.

3. The non-transitory machine readable medium of claim 1, wherein a magnitude of impedance of said capacitor is equal to a magnitude of a sum of a first impedance due to said self-inductance and a second impedance due to said mutual inductance within a frequency range between 1 GHz and 1 THz.

4. The non-transitory machine readable medium of claim 1, further comprising another element representing another inductive circuit element inductively coupled with said signal transmission line and directly connected to said second signal input node and said second signal output node.

5. The non-transitory machine readable medium of claim 1, further comprising:

a first additional element representing an additional inductive circuit element having a mutual inductance with said signal transmission line through inductive coupling; and

a second additional element representing an additional capacitor having a first additional capacitor node and a second additional capacitor node, wherein said first additional capacitor node is directly connected to an end of said additional inductive circuit element, and wherein said second additional capacitor node is electrically grounded.

6. The non-transitory machine readable medium of claim 1, wherein a total inductance of said signal transmission line as a function of frequency includes divergent singularities between 1 GHz and 1 THz.

7. The non-transitory machine readable medium of claim 1, wherein said set of encoded instructions is configured to generate said representation in a format perceptible by humans.