Semiconductor wafer carrier and method of manufacturing

• US 8,859,424 B2
• Filed: 07/21/2010
• Issued: 10/14/2014
• Est. Priority Date: 08/14/2009
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lu, Yung-Jean, Chen, Ming-Fa, Chen, Chen-Shien, Huang, Jao Sheng
• Primary Examiner(s): Payen, Marvin
• Application Number:
  US12/840,903
• Publication Number:
  US 20110035937A1
• Time in Patent Office: 1,546 Days
• Field of Search: 438/667
• US Class Current: 438/667
• CPC Class Codes: H01L 21/6833 Details of electrostatic chucks
• CPC Class Codes: Y10T 29/49124 On flat or curved insulated base, e.g., printed circuit, etc.

Abstract

A system and method for a semiconductor wafer carrier is disclosed. An embodiment comprises a semiconductor wafer carrier wherein conductive dopants are implanted into the carrier in order to amplify the coulombic forces between an electrostatic chuck and the carrier to compensate for reduced forces that result from thinner semiconductor wafers. Another embodiment forms conductive layers and vias within the carrier instead of implanting conductive dopants.

Claims

1. A method of forming a semiconductor device comprising:

providing a semiconductor wafer comprising a substrate and one or more through-substrate vias extending into a part of the substrate;

providing a carrier comprising one or more ionic dopants, the one or more ionic dopants having a concentration greater than 5×

10¹⁴ cm<sup>−

1</sup>;

attaching the semiconductor wafer to the carrier using a removable medium; and

removing the carrier from the semiconductor wafer.

2. The method of claim 1, wherein the one or more ionic dopants comprises sodium.

3. The method of claim 1, wherein the one or more ionic dopants comprises potassium.

4. The method of claim 1, wherein the one or more ionic dopants comprises sodium and boron.

5. The method of claim 1, wherein the providing a carrier further comprises:

providing a carrier free of ionic dopants; and

doping the carrier with the one or more ionic dopants.

6. The method of claim 1, wherein the one or more through-substrate vias comprise copper.

7. The method of claim 1, wherein the carrier comprises glass.

8. The method of claim 1, wherein the carrier comprises a silicon base material.

20. The method of claim 1, further comprising applying a power source in a range of between about 1,000 W and about 4,000 W.

9. A method of manufacturing a semiconductor device, the method comprising:

providing a carrier, the carrier comprising a first substrate and one or more ionic dopants located within the first substrate;

attaching the carrier to a first side of a semiconductor wafer, the semiconductor wafer comprising a semiconductor substrate and at least one conductive via extending through the semiconductor substrate, wherein the at least one conductive via is located within the semiconductor substrate during the attaching the carrier to the first side of the semiconductor wafer; and

adhering the carrier to an electrostatic chuck using coulombic forces.

10. The method of claim 9, wherein the one or more ionic dopants comprises sodium.

11. The method of claim 9, wherein the one or more ionic dopants comprises potassium.

12. A method of manufacturing a semiconductor device, the method comprising:

providing a carrier wafer with an ionic dopant located within the carrier wafer;

forming one or more conductive vias through a semiconductor wafer;

attaching the semiconductor wafer to the carrier wafer after the forming the one or more conductive vias; and

applying a voltage to an electrode within an electrostatic chuck to hold the carrier wafer to the electrostatic chuck.

13. The method of claim 12, wherein the ionic dopant comprises potassium.

14. The method of claim 12, wherein the ionic dopant comprises sodium and boron.

15. The method of claim 12, wherein the carrier wafer comprises glass.

16. The method of claim 12, wherein a concentration of the ionic dopant is greater than 5×

10¹⁴ cm<sup>−

1</sup>.

17. The method of claim 12, wherein the providing the carrier wafer further comprises:

providing the carrier wafer free of the ionic dopant; and

doping the carrier wafer with the ionic dopant.

18. The method of claim 12, wherein the one or more conductive vias comprise copper.

19. The method of claim 12, wherein the carrier wafer comprises silicon.