Semiconductor element, method for manufacturing the semiconductor element, and semiconductor device including the semiconductor element

• US 8,860,021 B2
• Filed: 12/17/2012
• Issued: 10/14/2014
• Est. Priority Date: 12/23/2011
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Isobe, Atsuo, Godo, Hiromichi
• Primary Examiner(s): Blum, David S
• Application Number:
  US13/716,909
• Publication Number:
  US 20130161606A1
• Time in Patent Office: 666 Days
• Field of Search: 257/43, 257/57, 257/E29.273, 257/E33.004, 257/E33.003
• US Class Current: 257/43
• CPC Class Codes: H01L 2029/7858 having contacts specially adapted to the FinFET geometry, e.g. wrap-around contacts
• CPC Class Codes: H01L 29/0603 characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions isolation regions between components H01L21/76; design considerations for integrated circuits H01L27/00; geometrical design considerations for devices H01L29/0657
• CPC Class Codes: H01L 29/12 characterised by the materials of which they are formed
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H10B 10/12 comprising a MOSFET load element
• CPC Class Codes: H10B 12/056 the transistor being a FinFET

Abstract

A structure including an oxide semiconductor layer which is provided over an insulating surface and includes a channel formation region and a pair of low-resistance regions between which the channel formation region is positioned, a gate insulating film covering a top surface and a side surface of the oxide semiconductor layer, a gate electrode covering a top surface and a side surface of the channel formation region with the gate insulating film positioned therebetween, and electrodes electrically connected to the low-resistance regions is employed. The electrodes are electrically connected to at least side surfaces of the low-resistance regions, so that contact resistance with the source electrode and the drain electrode is reduced.

Claims

1. A semiconductor element comprising:

an oxide semiconductor layer comprising;

a first low-resistance region;

a second low-resistance region; and

a channel formation region between the first low-resistance region and the second low-resistance region, wherein the channel formation region comprises a first side surface and a second side surface opposite to the first side surface;

a first insulating film over the oxide semiconductor layer;

a gate electrode facing a top surface, the first side surface, and the second side surface of the channel formation region with the first insulating film interposed therebetween;

a second insulating film over the gate electrode;

a first electrode over the second insulating film; and

a second electrode over the second insulating film,

wherein the first low-resistance region and the second low-resistance region each have a resistance lower than the channel formation region, and

wherein the first electrode is in contact with the first low-resistance region through a first opening in the first insulating film and the second insulating film, and

wherein the second electrode is in contact with the second low-resistance region through a second opening in the first insulating film and the second insulating film.

2. The semiconductor element according to claim 1,

wherein a side surface of the first electrode is in contact with the first low-resistance region, and

wherein a side surface of the second electrode is in contact with the second low-resistance region.

3. The semiconductor element according to claim 1,

wherein a bottom surface of the first electrode is provided in the first low-resistance region, and

wherein a bottom surface of the second electrode is provided in the second low-resistance region.

4. The semiconductor element according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

5. The semiconductor element according to claim 1, wherein a width of the channel formation region in a channel width direction is longer than or equal to 1 nm to shorter than or equal to 60 nm.

6. A semiconductor element comprising:

a first electrode;

a second electrode;

an oxide semiconductor layer between the first electrode and the second electrode, wherein the oxide semiconductor layer has a first side surface and a second side surface opposite to the first side surface;

a first insulating film over the first electrode, the second electrode, and the oxide semiconductor layer;

a gate electrode facing a top surface, the first side surface, and the second side surface of the oxide semiconductor layer with the first insulating film interposed therebetween;

a second insulating film over the gate electrode;

a first wiring over the second insulating film; and

a second wiring over the second insulating film,

wherein a side surface of the first electrode and a side surface of the second electrode is in contact with the oxide semiconductor layer,

wherein the first wiring is in contact with the first electrode through a first opening in the first insulating film and the second insulating film, and

wherein the second wiring is in contact with the second electrode through a second opening in the first insulating film and the second insulating film.

7. The semiconductor element according to claim 6, wherein the oxide semiconductor layer comprises indium and zinc.

8. The semiconductor element according to claim 6, wherein a width of the oxide semiconductor layer in a channel width direction is longer than or equal to 1 nm to shorter than or equal to 60 nm.

9. A semiconductor element comprising:

an oxide semiconductor layer;

a first insulating film over the oxide semiconductor layer;

a gate electrode facing part of a top surface of the oxide semiconductor layer, part of a first side surface of the oxide semiconductor layer, and part of a second side surface of the oxide semiconductor layer with the first insulating film interposed therebetween, wherein the first side surface is opposite to the second side surface;

a second insulating film over the gate electrode;

a first electrode over the second insulating film; and

a second electrode over the second insulating film,

wherein the first electrode is in contact with the oxide semiconductor layer through a first opening in the first insulating film and the second insulating film, and

wherein the second electrode is in contact with the oxide semiconductor layer through a second opening in the first insulating film and the second insulating film.