Semiconductor device having diode characteristic

• US 8,860,171 B2
• Filed: 12/14/2010
• Issued: 10/14/2014
• Est. Priority Date: 12/15/2009
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kitagawa, Mitsuhiko
• Primary Examiner(s): Kraig, William F
• Assistant Examiner(s): Nicely, Joseph C
• Application Number:
  US12/968,188
• Publication Number:
  US 20110140180A1
• Time in Patent Office: 1,400 Days
• Field of Search: 257/493, 257/330, 257/492, 257/654, 257/E27.016, 257/E27.027, 257/E27.051, 257/E29.257, 257/E29.329, 257/E29.338
• US Class Current: 257/492
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0814 Diodes only
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0638 for preventing surface leakage due to surface inversion layer, e.g. with channel stopper channel stoppers in combination with isolation region for integrated circuits H01L21/762
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/41 characterised by their shape, relative sizes or dispositions
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

According to one embodiment, a semiconductor device is provided. The semiconductor device has a first region formed of semiconductor and a second region formed of semiconductor which borders the first region. An electrode is formed to be in ohmic-connection with the first region. A third region is formed to sandwich the first region. A first potential difference is produced between the first and the second regions in a thermal equilibrium state, according to a second potential difference between the third region and the first region.

Claims

1. A semiconductor device comprising:

a first region formed of semiconductor;

a second region formed of semiconductor which borders the first region;

an electrode formed to be in ohmic-connection with the first region; and

a third region formed to sandwich the first region with the second region, wherein a first potential difference that is produced between the first and the second regions in a thermal equilibrium state is based on a second potential difference between the third region and the first region.

2. The semiconductor device according to claim 1, wherein

a potential φ

a of the first region in a thermal equilibrium state is set by at least one of a conductivity type of the first region, an impurity concentration of the first region, a material of the electrode, a conductivity type of the third region, or an impurity concentration of the third region, and

the difference between the potential φ

a and a potential φ

b of the second region in a thermal equilibrium state is lower than a built-in voltage which depends on a band gap of the second region.

3. A semiconductor device comprising:

an anode electrode and a cathode electrode arranged with an interval between the electrodes;

a first-conductivity type cathode layer having a first impurity concentration, the cathode layer being formed on the cathode electrode;

a first-conductivity type drift layer formed on the cathode layer and having a second impurity concentration that is lower than the first impurity concentration;

a plurality of trenches formed at intervals in a portion of the drift layer on an anode electrode side;

a plurality of semiconductor regions, each semiconductor region extending between adjacent trenches;

an insulating film formed on each inner wall of the trenches;

a buried electrode provided in each of the trenches on the insulating film; and

a plurality of first-conductivity type layers and a plurality of second-conductivity type layers, the first-conductivity type layers alternating with the second-conductivity type layers provided between each semiconductor region and the anode electrode and contacting the semiconductor region, the first-conductivity type layers having a third impurity concentration that is higher than the second impurity concentration, the second-conductivity type layers having a fourth impurity concentration that is higher than the second impurity concentration,

wherein a first potential difference that is produced between the first-conductivity type drift layer and the plurality of semiconductor regions in a thermal equilibrium state is based on a second potential difference between the first-conductivity type drift layer and a region comprising the plurality of first-conductivity type layers and the plurality of second-conductivity type layers.

4. The semiconductor device according to claim 3, wherein the buried electrode provided in each of the trenches is electrically connected to the anode electrode.

5. The semiconductor device according to claim 3, wherein each semiconductor region has an impurity concentration that is higher than an impurity concentration of a portion of the first-conductivity type drift layer on a cathode electrode side.

6. The semiconductor device according to claim 3, wherein at least one of the semiconductor regions is a second conductivity type.

7. The semiconductor device according to claim 6, wherein the semiconductor regions includes a first-conductivity type semiconductor region and a second-conductivity type semiconductor region, ones of the buried electrodes arranged on both sides of the second-conductivity type semiconductor region is a gate of a MOSFET, the first-conductivity type semiconductor region is a portion of diode, and the MOSFET and the diode are electrically connected in reversely parallel.

8. The semiconductor device according to claim 3, wherein the buried electrode provided in each of the trenches is made of a same metal as the anode electrode.

9. The semiconductor device according to claim 3, wherein an insulating layer is buried in a portion of a space surrounded by each of the trenches and located on the anode electrode side, and the buried electrodes are provided in another portion of the space located on the cathode electrode side.

10. The semiconductor device according to claim 3, wherein

a potential φ

a of the semiconductor regions in a thermal equilibrium state is set by at least one of a conductivity type of the semiconductor regions, an impurity concentration of the semiconductor regions, a material of the buried electrode provided in each of the trenches, a material of the insulating film formed on each inner wall of the trenches, or an interval between the trenches, and

the difference between the potential φ

a and a potential φ

b of the first-conductivity type drift layer in a thermal equilibrium state is lower than a built-in voltage which depends on a band gap of a semiconductor material constituting the first-conductivity type drift layer, the first-conductivity type layers, and the second-conductivity type layers.

11. The semiconductor device according to claim 3, wherein the plurality of semiconductor regions constitutes a passage of a current flowing from the anode electrode when the device is biased in a forward direction, and

the passage of the current flowing from the anode electrode is pinched off by depletion layers extending from the trenches on both sides of each of the semiconductor regions when the device is biased in a reverse direction.