Method and system for driving a light emitting device display

• US 8,860,636 B2
• Filed: 09/29/2010
• Issued: 10/14/2014
• Est. Priority Date: 06/08/2005
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Nathan, Arokia, Chaji, G. Reza
• Primary Examiner(s): Kumar, Srilakshmi K
• Assistant Examiner(s): Abebe, Sosina
• Application Number:
  US12/893,148
• Publication Number:
  US 20110012884A1
• Time in Patent Office: 1,476 Days
• Field of Search: 345 55-103, 345176-183, 345/204, 313/463, 315/169.3
• US Class Current: 345/76
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2310/0216 Interleaved control phases for different scan lines in the same sub-field, e.g. initialization, addressing and sustaining in plasma displays that are not simultaneous for all scan lines
• CPC Class Codes: G09G 2310/0218 with collection of electrodes in groups for n-dimensional addressing
• CPC Class Codes: G09G 2310/0221 with use of split matrices G09G3/3644 and G09G3/3666 take precedence
• CPC Class Codes: G09G 2310/0283 Arrangement of drivers for different directions of scanning
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A method and system for driving a light emitting device display is provided. The system provides a timing schedule which increases accuracy in the display. The system may provide the timing schedule by which an operation cycle is implemented consecutively in a group of rows. The system may provide the timing schedule by which an aging factor is used for a plurality of frames.

Claims

1. A display system comprising:

a pixel array including a plurality of pixel circuits divided into a plurality of segments, each of the plurality of segments including pixel circuits in more than one row of the pixel array, each pixel circuit having a light emitting device, a drive transistor for driving the light emitting device to emit light, a capacitor, a first switch transistor connected to a data line for programming the pixel circuit, and a second switch transistor for generating a threshold voltage of the drive transistor; and

a driver for controlling the first switch transistor of the plurality of pixel circuits to receive data during a programming operation and controlling the second switch transistor of the plurality of pixel circuits to generate the threshold voltage of the drive transistor during a generating threshold voltage operation, the data being stored in the capacitor during the programming operation, the driver implementing a segmented addressing scheme using the plurality of segments,

wherein the driver is configured to implement the generating threshold voltage operation in a plurality of pixel circuits in more than one row of the pixel array in a first segment of the plurality of segments while simultaneously implementing a driving operation or programming operation in a second pixel circuit in a second segment of the plurality of segments, wherein the driver implements the generating threshold voltage operation in all of the pixel circuits in the first segment before implementing any generating threshold voltage operation in any of the pixel circuits in the second segment.

2. A display system as claimed in claim 1, wherein the driver is configured to implement the programming operation to the second segment while implementing the generating threshold voltage operation to the first segment independently from the programming operation.

3. A display system as claimed in claim 1, wherein each segment includes a plurality of rows, the programming operation being carried out consecutively on each of the plurality of rows in each segment.

4. A display system as claimed in claim 1, wherein each segment includes a plurality of rows, the generating threshold voltage operation being carried out consecutively on each segment.

5. A display system as claimed in claim 1, wherein the plurality of pixel circuits are each configured with a gate terminal of the first switch transistor being connected to a first select line, the gate terminal of the second switch transistor being connected to a second select line, the first and second select lines being driven by the driver, the first terminal of the second switch transistor being connected to a gate terminal of the drive transistor, a first terminal of the first switch transistor being connected to the data line, a second terminal of the first switch transistor being connected to the gate terminal of the drive transistor, the data line being driven by the driver, the capacitor being connected between the gate terminal of the drive transistor and the light emitting device.

6. A display system as claimed in claim 1, wherein the plurality of pixel circuits are each configured with the capacitor being a first capacitor, each of the plurality of pixel circuits further including a second capacitor and a third switch transistor, and wherein the plurality of pixel circuits are each configured with a gate terminal of the first switch transistor being connected to a first select line, gate terminals of the second and third switch transistors being connected to a second select line, the first and second select lines being driven by the driver, a first terminal of the first switch transistor being connected to the data line a second terminal of the first switch transistor being connected to the first and second capacitors, a first terminal of the second switch transistor being connected to the first and second capacitors, a first terminal of the third switch transistor being connected to the drive transistor and the light emitting device, a second terminal of the third switch transistor being connected to a gate terminal of the drive transistor, the first and second capacitors being connected to the gate terminal of the drive transistor in series.

7. A display system as claimed in claim 6, wherein the second switch transistor, the third switch transistor and the drive transistor form a circuit for generating the threshold voltage of the drive transistor.

8. A display system as claimed in claim 1, wherein at least one of the transistors is fabricated using amorphous silicon, nano/micro crystalline silicon, poly silicon, organic semiconductor including organic transistor, NMOS/PMOS technology or CMOS technology including MOSFET, a p-type material, or n-type material.

9. A display system as claimed in claim 1, wherein the drive transistor or the light emitting device is connected to a controllable voltage line controlled by the driver for precharging the capacitor of the pixel circuit during a first phase of the generating threshold voltage operation.

10. A display system as claimed in claim 1, wherein the capacitor is connected between a gate terminal of the drive transistor and the light emitting device in each pixel circuit.

11. A display system as claimed in claim 1, wherein the plurality of pixel circuits are each configured with the capacitor being a first capacitor having a first terminal and a second terminal, the first terminal being connected to a gate terminal of the drive transistor, each of the plurality of pixel circuits further including a second capacitor having a first terminal connected to the second terminal of the first capacitor and a second terminal connected to a potential, and wherein the first switch transistor is connected to the first terminal of the second capacitor and the second terminal of the first capacitor.

12. A display system as claimed in claim 1, wherein the driver is further configured to drive the second pixel circuit in the second segment to emit light while the threshold voltages of the plurality of pixel circuits in the first segment are being generated.