Hardware de-convolution block for multi-phase scanning
First Claim
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1. A processing device comprising:
- a memory device configured to store a capacitance map comprising convolved capacitance data, wherein the convolved data is a result of multi-phase transmit (TX) scanning of a sense array with a plurality of TX patterns, the scanning of the sense array with each of the plurality of TX patterns including simultaneously driving different phases of a signal on the sense array; and
a de-convolution circuit block coupled to the memory device, wherein the de-convolution circuit block is configured to de-convolve the convolved capacitance data with inverses of the plurality of TX patterns to obtain capacitance data for a de-convolved capacitance map.
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Abstract
Apparatuses and methods of hardware de-convolution for multi-phase scanning of a touch arrays are described. One apparatus includes a memory device configured to store a capacitance map including convolved capacitance data. The convolved data are results of multi-phase transmit (TX) scanning of a sense array with multiple TX patterns. The apparatus further comprises a de-convolution circuit block coupled to the memory device. The de-convolution circuit block is configured to de-convolve the convolved capacitance data with inverses of the multiple TX patterns to obtain capacitance data for a de-convolved capacitance map.
52 Citations
20 Claims
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1. A processing device comprising:
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a memory device configured to store a capacitance map comprising convolved capacitance data, wherein the convolved data is a result of multi-phase transmit (TX) scanning of a sense array with a plurality of TX patterns, the scanning of the sense array with each of the plurality of TX patterns including simultaneously driving different phases of a signal on the sense array; and a de-convolution circuit block coupled to the memory device, wherein the de-convolution circuit block is configured to de-convolve the convolved capacitance data with inverses of the plurality of TX patterns to obtain capacitance data for a de-convolved capacitance map. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 12)
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11. The processing device of 1, wherein the de-convolution circuit block is configured to issue an interrupt to a central processing unit (CPU) of the processing device to indicate a de-convolved capacitance map is available for further processing by the CPU.
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13. A method comprising:
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storing a capacitance map in a memory device of a processing device, wherein the capacitance map comprises convolved capacitance data, wherein the convolved data is a result of a multi-phase transmit (TX) scanning of a sense array with a plurality of TX patterns, the scanning of the sense array with each of the plurality of TX patterns including simultaneously driving different phases of a signal on the sense array; and de-convoluting, by a de-convolution circuit block of the processing device, the convolved capacitance data with inverses of the plurality of TX patterns to obtain capacitance data for a de-convolved capacitance map. - View Dependent Claims (14, 15, 16, 17)
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18. A touchscreen controller (TSC) device comprising:
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a capacitance-sensing circuit configured to obtain a capacitance map comprising a capacitance of an intersection of a transmit (TX) electrode and a receive (RX) electrode of a touchscreen, wherein the capacitance map is convolved as a result of a multi-phase TX scanning of the touchscreen, the multi-phase TX scanning of the touchscreen including driving different phases of a signal on the touchscreen during a period; a memory device coupled to the capacitance-sensing circuit, wherein the memory device is configured to store the capacitance map; and a programmable digital circuit block comprising; a register comprising a plurality of register fields to store a plurality of programmable coefficients for de-convolution calculations; and a de-convolution engine configured to perform the de-convolution calculations of the capacitance map using the plurality of programmable coefficients to obtain a de-convolved capacitance map and to issue an interrupt to indicate an availability of the de-convolved capacitance map to a processor core when the de-convolution calculations are performed. - View Dependent Claims (19, 20)
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Specification