Electrical wiring device with protective features

• US 8,861,146 B2
• Filed: 12/17/2010
• Issued: 10/14/2014
• Est. Priority Date: 12/17/2010
• Status: Expired due to Fees

• Current Assignee: Pass & Seymour Incorporated (Legrand SA)
• Original Assignee: Pass & Seymour Incorporated (Legrand SA)
• Inventors: McMahon, Michael, Morgan, Kent R.
• Primary Examiner(s): Kitov, Zeev V
• Application Number:
  US12/972,106
• Publication Number:
  US 20120154972A1
• Time in Patent Office: 1,397 Days
• Field of Search: 361/42, 361/45, 361/44, 361/49
• US Class Current: 361/42
• CPC Class Codes: G01R 31/55 Testing for incorrect line connections
• CPC Class Codes: H01H 1/0015 Means for testing or for inspecting contacts, e.g. wear indicator measuring circuits G01R31/3274
• CPC Class Codes: H01H 47/22 for supplying energising current for relay coil
• CPC Class Codes: H01H 83/04 with testing means for indicating the ability of the switch or relay to function properly
• CPC Class Codes: H02H 3/162 for ac systems
• CPC Class Codes: H02H 3/335 the main function being self testing of the device

Abstract

The present invention is directed to an electrical wiring device for use in an electrical distribution system. The device includes a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors. The protective circuit assembly includes at least one fault detector configured to generate a fault detection signal based on electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals. A device integrity evaluation circuit includes a timing circuit coupled to the source of AC power by way of the plurality of load terminals and configured to generate a time measurement. The device integrity evaluation circuit is configured to reset the time measurement if the protective circuit assembly generates the fault detection signal during a predetermined test interval in the properly wired condition. The device integrity evaluation circuit is configured to generate a device integrity fault signal when the time measurement exceeds a predetermined threshold. A circuit interrupter assembly includes movable contacts configured to be latched into a reset state in response to a reset stimulus. The movable contacts are configured to be driven into a tripped state in response to the fault detection signal or the device integrity fault signal.

Claims

1. An electrical wiring device for use in an electrical distribution system including a plurality of line conductors coupled to a source of AC power and a plurality of load conductors, comprising:

a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors, the electrical wiring device being in a properly wired condition when the plurality of line conductors are terminated to the plurality of line terminals and in a miswired condition when the plurality of line conductors are terminated to the plurality of load terminals;

a circuit interrupter assembly including a plurality of moveable contacts, the plurality of movable contacts being configured to be latched into a reset state in response to a reset stimulus whereby the plurality of line terminals are electrically coupled to the plurality of load terminals, the movable contacts being configured to be driven into a tripped state in response to a tripping stimulus whereby the plurality of line terminals are electrically decoupled from the plurality of load terminals;

a protective circuit assembly including at least one power supply coupled to the plurality of line terminals, the at least one power supply being charged in the reset state and in the tripped state when the device is in the properly wired condition, the protective circuit assembly including an automatic test circuit configured to introduce a test fault condition during a predetermined test interval when the device is in the reset state or when the device is in the tripped state and in the properly wired condition, the protective circuit assembly also including at least one fault detector deriving power from the at least one power supply and configured to generate a fault detection signal based on electrical perturbations propagating on at least one of the plurality of line terminals and a test fault detection signal in response to the test fault condition if the protective circuit assembly is operable and the at least one power supply is substantially charged; and

a device integrity evaluation circuit coupled to the plurality of load terminals, the device integrity evaluation circuit including a timing circuit configured to provide a time measurement and the tripping stimulus when the time measurement exceeds a predetermined threshold, the test fault detection signal resetting the time measurement in the properly wired condition before the time measurement exceeds the predetermined threshold but does not reset the time measurement in the miswired condition.

2. The device of claim 1, wherein the protective circuit assembly includes at least one sensor coupled to the at least one fault detector, the at least one sensor providing a sensor output signal corresponding to electrical perturbations propagating on at least one of the plurality of line terminals or at least one of the plurality of load terminals, and wherein the at least one fault detector generates the fault detection signal or the test fault detection signal based on the sensor output signal.

3. The device of claim 1, wherein the at least one power supply is coupled to the plurality of load terminals via an isolation component.

4. The device of claim 1, wherein the test fault condition is introduced during a predetermined portion of an AC line cycle.

5. The device of claim 4, wherein the test fault condition is introduced during a negative half cycle of the AC line cycle.

6. The device of claim 4, wherein the test fault condition is introduced during portions of a positive half cycle of the AC line cycle and portions of a negative half cycle of the AC line cycle.

7. The device of claim 2, wherein the at least one power supply is configured to substantially suppress the sensor output signal at or near a conclusion of the predetermined test interval.

8. The device of claim 1, wherein the at least one first power supply is coupled to the plurality of line terminals by way of an indicator circuit when the circuit interrupter is in the tripped state.

9. The device of claim 1, further comprising a wiring state detection circuit coupled between the line terminals and configured to conduct a predetermined current flow if the proper wiring condition has been effected.

10. The device of claim 9, wherein the predetermined current flow simulates a fault condition.

11. The device of claim 9, further comprising at least one circuit is configured to be open circuited after AC power is initially applied to the line terminals.

12. The device of claim 11, wherein the at least one circuit includes at least one switch element, the predetermined current flow being conducted if the at least one switch element is closed.

13. The device of claim 11, wherein the at least one circuit is opened after the predetermined current flow is conducted.

14. The device of claim 11, wherein the at least one switch element opens independently of the circuit interrupter assembly being tripped and closes independently of the circuit interrupter assembly being reset.

15. The device of claim 11, wherein the at least one switch element includes at least one contact coupled to a printed circuit board.

16. The device of claim 11, wherein the at least one circuit includes a circuit component that is open circuited in response to conduction of the predetermined current flow.

17. The device of claim 1, wherein the device integrity evaluation circuit is coupled to the plurality of load terminals by way of at least one power isolation component.

18. The device of claim 17, wherein the at least one power isolation component includes an auxiliary switching element, the auxiliary switching element being configured to decouple the device integrity evaluation circuit from one of the plurality of line terminals when the circuit interrupter assembly is in the tripped state.

19. The device of claim 17, wherein the at least one power isolation component is selected from a family of components that includes air gap structures, impedance devices, semi-conducting devices, or optical coupled devices.

20. The device of claim 17, wherein the at least one isolation component provides isolation selectively when the circuit interrupter is in the tripped state or the reset state.

21. The device of claim 20, wherein a trip indicator is coupled to the at least one isolation component.

22. The device of claim 1, further comprising a wiring state detection circuit assembly, the assembly comprising:

a first circuit coupled between the plurality of line terminals and configured to provide a predetermined response in the properly wired condition, the circuit being substantially disabled after the occurrence of the predetermined response; and

a second circuit coupled between the plurality of load terminals, the second circuit being configured to provide power to the device integrity evaluation circuit from the plurality of load terminals when the device is in the miswired condition and in the tripped state.

23. The device of claim 22, wherein the protective circuit assembly is configured to generate the fault detection signal in response to the predetermined response.

24. The device of claim 1, wherein the device integrity evaluation circuit further comprises:

an accumulation circuit configured to derive power from the plurality of line terminals in the properly wired condition or from the plurality of load terminals in the miswired condition, the accumulation circuit being configured to accumulate charge, the time measurement being a function of accumulated charge, the accumulated charge being substantially reduced to zero in response to the test fault detection signal;

an actuator assembly coupled to the circuit interrupter assembly, the actuator assembly being configured to provide the tripping stimulus when the accumulated charge exceeds a predetermined threshold.

25. The device of claim 1, further comprising an indicator circuit including at least one indicator, and wherein the fault detector further includes an SCR that generates an output signal, the indicator circuit being configured to activate the at least one indicator when the SCR fails to generate the output signal within a predetermined period of time.

26. The device of claim 25, wherein the indicator emits a flashing indication or a beeping indication when activated by the indicator circuit.

27. The device of claim 1, wherein the device integrity evaluation circuit further comprises an accumulation circuit configured to generate a voltage as a function of the time measurement, the voltage being substantially reduced to zero in response to the test fault detection signal.

28. The device of claim 27, further comprising an indicator circuit including at least one indicator, the indicator circuit being configured to activate the at least one indicator when the voltage is greater than a predetermined threshold.

29. The device of claim 28, wherein the indicator emits a flashing indication or a beeping indication when activated by the indicator circuit.

30. The device of claim 1, wherein the circuit interrupter assembly includes a first solenoid and a second solenoid, the circuit interrupter assembly being driven into the tripped state by either the first solenoid or the second solenoid.

31. The device of claim 30, wherein the first solenoid and the second solenoid are separated by an insulative barrier.

32. The device of claim 31, wherein the first solenoid and the second solenoid are connected to a plurality of termination pins partially disposed in the insulative barrier.

33. The device of claim 30, wherein the first solenoid and the second solenoid are connected together by way of two termination pins.

34. The device of claim 1, wherein the movable contacts include two sets of movable contacts coupled to a latch mechanism.

35. The device of claim 34, wherein the plurality of load terminals includes a plurality of feed-through load terminals and a plurality of receptacle load terminals, and wherein the two sets of movable contacts are configured to establish electrical continuity between the plurality of line terminals, the plurality of feed-through load terminals and a plurality of receptacle load terminals in the reset state, and interrupt electrical continuity between the plurality of line terminals, the plurality of feed-through load terminals and the plurality of receptacle load terminals in the tripped state.

36. The device of claim 35, wherein the two sets of movable contacts include a set of movable neutral contacts and a set of movable hot contacts.

37. The device of claim 36, wherein the set of movable neutral contacts include a neutral line contact, a neutral load contact and a neutral receptacle terminal contact, and wherein the set of movable hot contacts include a hot line contact, a hot load contact and a hot receptacle terminal contact.

38. The device of claim 34, further comprising at least one auxiliary switch coupled to the latch mechanism.

39. The device of claim 38, wherein the circuit interrupter assembly includes at least one solenoid coupled to the protective circuit assembly and responsive to the fault detection signal or the device integrity fault signal, the at least one auxiliary switch being configured to substantially decouple the at least one solenoid from the protective circuit in the tripped state.

40. The device of claim 38, wherein the at least one auxiliary switch is configured to isolate at least a portion of the device integrity evaluation circuit from the protective circuit assembly in the tripped state.

41. The device of claim 1, further comprising an indicator circuit including at least one indicator coupled to a switch, the switch being configured to couple the at least one indicator to one of the plurality of line terminals in the tripped state and disconnect the at least one indicator otherwise.

42. The device of claim 1, further comprising an indicator circuit configured to emit a flashing indication or a beeping indication when the device integrity evaluation circuit determines that the device has reached an end-of-life state.

43. The device of claim 42, wherein the device integrity evaluation circuit determines that the device has reached an end-of-life state when the test fault detection signal fails to reset the time measurement in the properly wired condition before the time measurement exceeds the predetermined threshold.

44. The device of claim 1, wherein the device integrity evaluation circuit determines that the device has reached an end-of-life state when the test fault detection signal fails to reset the time measurement in the properly wired condition before the time measurement exceeds the predetermined threshold.

45. A method for electrical power to a load via an electrical distribution system including a plurality of line conductors coupled to a source of AC power and a plurality of load conductors, the method comprising:

providing an electrical wiring device including a plurality of line terminals configured to terminate the plurality of line conductors and a plurality of load terminals configured to terminate the plurality of load conductors, the electrical wiring device being in a properly wired condition when the plurality of line conductors are terminated to the plurality of line terminals and in a miswired condition when the plurality of line conductors are terminated to the plurality of load terminals, the plurality of line terminals being electrically coupled to the plurality of load terminals in a reset state, the plurality of line terminals being electrically decoupled from the plurality of load terminals in a tripped state;

charging at least one power supply when the device is in the reset state, and when the device is in the tripped state and in the properly wired condition;

introducing a test fault condition during a predetermined test interval when the device is in the reset state, or when the device is in the tripped state and in the properly wired condition;

generating a test fault detection signal in response to detecting the test fault condition if the at least one power supply is substantially charged, the test fault detection signal indicating that the device is operable, a failure to generate the test fault detection signal within a predetermined time period indicating that the device is at end-of-life;

measuring elapsed time when the test fault condition is introduced; and

providing a test failure signal and a tripping stimulus if the elapsed time is substantially greater than the predetermined time period, or resetting the elapsed time measurement in response to generating the test fault detection signal, the elapsed time not being reset when the device is in the miswired condition.

46. The method of claim 45, further comprising the step of uniquely indicating a plurality of state conditions of the device.

47. The method of claim 46, wherein the plurality of state conditions includes a state condition wherein the device is in the properly wired condition and in the tripped state.

48. The method of claim 47, wherein the state condition is indicated by emitting a steady, a beeping or a flashing human-perceivable indicia.

49. The method of claim 46, wherein the plurality of state conditions includes a state condition wherein the device is in the end of life condition.

50. The method of claim 49, wherein the state condition is indicated by emitting a steady, a beeping or a flashing human-perceivable indicia.

51. The method of claim 46, wherein the plurality of state conditions includes a state condition wherein the device is in the miswired state.

52. The method of claim 51, wherein the state condition is indicated by emitting a steady, a beeping or a flashing human-perceivable indicia.

53. The method of claim 46, wherein the plurality of state conditions includes a state condition wherein the device is in the reset state and not at end-of-life, the state condition being indicated by presenting a visual indicator or an audible indicator in an OFF state.