Internal data load for non-volatile storage

• US 8,861,269 B2
• Filed: 03/05/2013
• Issued: 10/14/2014
• Est. Priority Date: 03/05/2013
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Chen, Wenzhou, Lee, Dana, Zhou, Zhenming, Liang, Guirong
• Primary Examiner(s): Pham, Ly D
• Application Number:
  US13/786,190
• Publication Number:
  US 20140254262A1
• Time in Patent Office: 588 Days
• Field of Search: 365/185.02, 365/185.03, 365/185.18, 365/185.2, 365/185.17, 365/185.21, 365/185.23
• US Class Current: 365/185.03
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/28 using differential sensing or reference cells, e.g. dummy cells
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 16/3454 Arrangements for verifying correct programming or for detecting overprogrammed cells
• CPC Class Codes: G11C 2211/5648 Multilevel memory programming, reading or erasing operations wherein the order or sequence of the operations is relevant

Abstract

Techniques are disclosed herein for performing an Internal Data Load (IDL) to sense non-volatile storage elements. Read pass voltages that are applied to the two neighbor word lines to a selected word line may be adjusted to result in a more accurate IDL. The read pass voltage for one neighbor may be increased by some delta voltage, whereas the read pass voltage for the other neighbor may be decreased by the same delta voltage. In one aspect, programming of an upper page of data into a word line that neighbors a target word line is halted to allow lower page data in the target memory cells to be read using an IDL and preserved in data latches while programming the upper page in the neighbor word completes. Preservation of the lower page data provides for a cleaner lower page when later programming the upper page into the target memory cells.

Claims

1. A method of operating non-volatile storage, comprising:

programming a lower page bit into a selected non-volatile storage element on a NAND string, the selected non-volatile storage element having a first neighbor on one side of the NAND string and a second neighbor non-volatile storage element on the other side of the NAND string;

programming an upper page bit into the first neighbor after programming the lower page bit into the selected non-volatile storage element;

sensing the selected non-volatile storage element after programming the upper page bit into the first neighbor and prior to programming an upper page bit into the second neighbor, the sensing comprising;

applying a read reference voltage to a control gate of the selected non-volatile storage element;

applying a first read pass voltage to a control gate of the first neighbor non-volatile storage element while applying the read reference voltage, the first read pass voltage is a delta greater than a read pass voltage that is applied to the first neighbor non-volatile storage element when reading the selected non-volatile storage element when an upper page bit is programmed on both neighbors;

applying a second read pass voltage to a control gate of the second neighbor non-volatile storage element, the second read pass voltage is the delta less than a read pass voltage that is applied to the second neighbor non-volatile storage element when reading the selected non-volatile storage element when an upper page bit is programmed on both neighbors; and

sensing the NAND string in response to applying the read reference voltage, the first read pass voltage and the second read pass voltage.

2. The method of claim 1, further comprising:

applying the first read pass voltage to the control gate of the first neighbor non-volatile storage element and applying the second read pass voltage to the control gate of the second neighbor non-volatile storage element while reading the selected non-volatile storage element when an upper page bit is programmed in the first neighbor non-volatile storage element, the selected non-volatile storage element, and the second neighbor non-volatile storage element.

3. The method of claim 1, wherein the applying a read reference voltage is performed prior to programming an upper bit in the selected non-volatile storage element, the read reference voltage is for reading a lower bit from the selected non-volatile storage element.

4. The method of claim 1, further comprising:

storing results of sensing the NAND string in a latch; and

programming an upper page bit in the selected non-volatile storage element based on results stored in the latch.

5. The method of claim 1, further comprising:

programming an upper page bit in the second neighbor non-volatile storage element after the sensing the NAND string in response to applying the read reference voltage.

6. The method of claim 1, wherein the first neighbor non-volatile storage element is a source side of the NAND string relative to the selected non-volatile storage element, the second neighbor non-volatile storage element is a drain side of the NAND string relative to the selected non-volatile storage element.

7. The method of claim 1, further comprising:

reading data in the first neighbor non-volatile storage element prior to the sensing of the selected non-volatile storage element after programming the upper page bit into the first neighbor and prior to programming an upper page bit into the second neighbor; and

adjusting the read reference voltage applied to the control gate of the selected non-volatile storage element while sensing the selected non-volatile storage element based on the data in the first neighbor non-volatile storage element.

15. The method of claim 1, wherein the NAND string is formed in a three-dimensional memory array.

8. A non-volatile storage device, comprising:

a plurality of non-volatile storage elements;

a plurality of word lines associated with the plurality of non-volatile storage elements, the plurality of word lines including a target word line, a first neighbor word line on one side of the target word line and a second neighbor word line on the other side of the target word line; and

one or more managing circuits in communication with the non-volatile storage elements and the plurality of word lines, the one or more managing circuits program a lower page into non-volatile storage elements associated with the target word line, the one or more managing circuits program an upper page into non-volatile storage elements associated with the first neighbor word line after programming the lower page into the target word line, the one or more managing circuits sense the non-volatile storage element associated with the target word line to read back the lower page after programming the upper page into the first neighbor word line and prior to programming an upper page into non-volatile storage elements associated with the second neighbor word line, during the sensing the one or more managing circuits apply a read reference voltage to the target word line, the second neighbor word line does not have an upper page programmed into its associated non-volatile storage elements during the sensing, the one or more managing circuits apply a first read pass voltage to the first neighbor word line while applying the read reference voltage to the target word line, the first read pass voltage is a delta greater than a read pass voltage that is applied to the first neighbor word line when reading selected non-volatile storage elements associated with the target word line when an upper page is programmed on both neighbor word lines, the one or more managing circuits apply a second read pass voltage to the second neighbor word line while applying the read reference voltage to the target word line, the second read pass voltage is a delta less than a read pass voltage that is applied to the second neighbor word line when reading non-volatile storage elements associated with the target word line when an upper page is programmed on both neighbor word lines, the one or more managing circuits store data for the selected non-volatile storage elements in response to the read reference voltage.

9. The non-volatile storage device of claim 8, wherein the one or more managing circuits apply the first read pass voltage to the first neighbor word line and apply the second read pass voltage to the second neighbor word line while reading non-volatile storage elements associated with the target word line when an upper page is programmed in the first neighbor word line, the target word line, and the second neighbor word line.

10. The non-volatile storage device of claim 8, wherein the one or more managing circuits program an upper page into the non-volatile storage elements associated with the target word line based on the data that was stored in response to the read reference voltage.

11. The non-volatile storage device of claim 8, wherein the one or more managing circuits store the data for the selected non-volatile storage elements in response to the read reference voltage in a set of latches, the one or more managing circuits program an upper page in the non-volatile storage elements associated with the target word line based on the data stored in the set of latches.

12. The non-volatile storage device of claim 8, wherein the one or more managing circuits program an upper page in non-volatile storage elements associated with the second neighbor word line after storing data for the selected non-volatile storage elements in response to the read reference voltage.

13. The non-volatile storage device of claim 8, wherein the plurality of non-volatile storage elements are included in a plurality of NAND strings having a source side and a drain side, the first neighbor word line is on the source side of the NAND strings relative to the target word line, the second neighbor word line is on the drain side of the NAND strings relative to the target word line.

14. The non-volatile storage device of claim 8, wherein the one or more managing circuits read data in the in non-volatile storage elements associated with the first neighbor word line prior to storing data for the selected non-volatile storage elements in response to the read reference voltage, the one or more managing circuits adjust the read reference voltage applied to the target word line based on the data in the non-volatile storage elements associated with the first neighbor word line.

16. A non-volatile storage device, comprising:

a three-dimensional memory array comprising a plurality of non-volatile storage elements;

a plurality of word lines associated with the plurality of non-volatile storage elements, the plurality of word lines including a target word line, a first neighbor word line on one side of the target word line and a second neighbor word line on the other side of the target word line; and

one or more managing circuits in communication with the non-volatile storage elements and the plurality of word lines, the one or more managing circuits program a lower page into non-volatile storage elements associated with the target word line, the one or more managing circuits program an upper page into non-volatile storage elements associated with the first neighbor word line after programming the lower page into the target word line, the one or more managing circuits sense the non-volatile storage element associated with the target word line to read back the lower page after programming the upper page into the first neighbor word line and prior to programming an upper page into non-volatile storage elements associated with the second neighbor word line, during the sensing the one or more managing circuits apply a read reference voltage to the target word line, the second neighbor word line does not have an upper page programmed into its associated non-volatile storage elements during the sensing, the one or more managing circuits apply a first read pass voltage to the first neighbor word line while applying the read reference voltage to the target word line, the first read pass voltage is a delta greater than a read pass voltage that is applied to the first neighbor word line when reading selected non-volatile storage elements associated with the target word line when an upper page is programmed on both neighbor word lines, the one or more managing circuits apply a second read pass voltage to the second neighbor word line while applying the read reference voltage to the target word line, the second read pass voltage is a delta less than a read pass voltage that is applied to the second neighbor word line when reading non-volatile storage elements associated with the target word line when an upper page is programmed on both neighbor word lines, the one or more managing circuits store data for the selected non-volatile storage elements in response to the read reference voltage.