Battery protecting circuit, method of controlling the same, and battery pack

• US 8,865,328 B2
• Filed: 02/28/2011
• Issued: 10/21/2014
• Est. Priority Date: 06/09/2010
• Status: Active Grant

• Current Assignee: Samsung SDI Company Limited
• Original Assignee: Samsung SDI Company Limited
• Inventors: Kim, Beom-Gyu, Segawa, Susumu, Hwang, Eui-Jeong, Sim, Se-Sub, Yang, Jong-Woon, Yun, Han-Seok, Kim, Jin-Wan
• Primary Examiner(s): Ryan, Patrick
• Assistant Examiner(s): Quraishi, Kiran
• Application Number:
  US13/037,158
• Publication Number:
  US 20110305926A1
• Time in Patent Office: 1,331 Days
• Field of Search: 429/7, 429/50, 429/90, 429/61, 320/162, 320/112, 320/116, 320/118, 320134-136, 320/120, 320/132, 327/403, 307/19, 307/23, 307/24, 307/80, 307/66, 318/139, 324/434, 700292-293
• US Class Current: 429/7
• CPC Class Codes: H01M 10/425 Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing printed circuits H05K1/00
• CPC Class Codes: H01M 2200/00 Safety devices for primary or secondary batteries
• CPC Class Codes: H02H 7/18 for batteries; for accumulators
• CPC Class Codes: H02J 7/0031 using battery or load disconnect circuits H02J9/002 takes precedence
• CPC Class Codes: H02J 7/0047 with monitoring or indicating devices or circuits
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

A battery pack is disclosed. The battery pack has an analog front end which senses if a failure occurs in a microcontroller, and interrupts charging and discharging of the battery in response to the failure.

Claims

1. A battery pack, comprising

a battery cell;

a terminal unit;

a switch selectively connecting the battery cell and the terminal unit;

a control processor that generates commands; and

an analog front end that receives the commands from the control processor and controls charging and discharging of the battery cell according to the commands, wherein the analog front end comprises;

a status input terminal connected to the control processor and that receives a status signal indicative of a status of the control processor,

a failure determination, processor connected to the status input terminal to receive the status signal, the failure determination processor generating a failure signal based on the status signal, the failure signal being indicative of whether the control processor has experienced a failure, and

a switch controller connected to the failure determination processor to receive the failure signal, wherein the switch controller further connects to the switch and outputs a control signal to control the switch according to the failure signal.

2. The battery pack of claim 1, wherein the failure determination processor comprises a voltage comparison unit that compares the status signal with a reference voltage, and the failure determination processor generates a failure signal if the status signal is greater than the reference voltage.

3. The battery pack of claim 1, wherein the failure determination processor comprises a voltage comparison unit that compares the status signal with a reference voltage, and the failure determination processor generates a failure signal if the status signal is less than the reference voltage.

4. The battery pack of claim 1, wherein the failure determination processor comprises a timer, and the failure determination processor generates a failure signal if the status signal is indicative of processor failure for a duration greater than a minimum time.

5. The battery pack of claim 4, further comprising a status indicator circuit that generates the status signal based on an operation status signal received from the control processor.

6. The battery pack of claim 5, wherein the status indicator circuit comprises a low pass filter.

7. The battery pack of claim 6, wherein the operation status signal comprises a plurality of pulses if the control processor has not experienced a failure.

8. The battery pack of claim 1, further comprising a status indicator circuit that generates the status signal based on an operation status signal received from the control processor.

9. The battery pack of claim 8, wherein the status indicator circuit comprises a low pass filter.

10. The battery pack of claim 9, wherein the operation status signal comprises a plurality of pulses if the control processor has not experienced a failure.

11. The battery pack of claim 8, wherein the status indicator circuit comprises a level shifter.

12. The battery pack of claim 11, wherein the level shifter comprises an inverter.

13. The battery pack of claim 1, wherein the status signal is encoded within the commands.

14. The battery pack of claim 13, wherein the status signal is a frequency of command generation.

15. The battery pack of claim 14, wherein the failure determination processor generates a failure signal if the frequency of command generation is less than a threshold.

16. The battery pack of claim 14, wherein the control processor is a microcontroller.