Nonvolatile semiconductor memory device

• US 8,866,139 B2
• Filed: 12/26/2012
• Issued: 10/21/2014
• Est. Priority Date: 03/08/2012
• Status: Active Grant

• Current Assignee: Kioxia Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ino, Tsunehiro
• Primary Examiner(s): Le, Thao P
• Application Number:
  US13/727,027
• Publication Number:
  US 20130234130A1
• Time in Patent Office: 664 Days
• Field of Search: 257/43
• US Class Current: 257/43
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 29/42332 with the floating gate formed by two or more non connected parts, e.g. multi-particles flating gate
• CPC Class Codes: H01L 29/42348 with trapping site formed by at least two separated sites, e.g. multi-particles trapping site
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66825 with a floating gate H01L29/6684 takes precedence
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence
• CPC Class Codes: H01L 29/7889 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H01L 29/7926 Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
• CPC Class Codes: H10B 43/27 the channels comprising vertical portions, e.g. U-shaped channels
• CPC Class Codes: H10B 43/35 with cell select transistors, e.g. NAND
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a first insulating film formed on the semiconductor layer; a charge storage film that is formed on the first insulating film, includes C60 fullerenes, and is not less than 0.5 monolayer but is less than 1.0 monolayer; a second insulating film formed on the charge storage film; and a control electrode formed on the second insulating film.

Claims

1. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C60 fullerenes;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein the C60 fullerenes have two molecules short-range order, and do not have long-range order.

2. The device according to claim 1, wherein the charge storage film is not less than 0.5 monolayer and is less than 1.0 monolayer.

4. The device according to claim 1, wherein the charge storage film comprises a matrix component between the C60 fullerenes.

6. The device according to claim 1, wherein the first insulating film comprises one of SiO₂, SiON, HfSiO, and parylene.

7. The device according to claim 1, wherein the second insulating film at least one material selected from the group consisting of SiO₂, SiN, Al₂O₃, MgO, CaF₂, La₂O₃, and HfO₂.

8. The device according to claim 1, wherein the control electrode comprises one of polycrystalline silicon, tantalum (Ta), and a tantalum compound.

3. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C60 fullerenes, the charge storage film being not less than 0.5 monolayer and being less than 1.0 monolayer;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein dimers of the C60 fullerenes are formed when charges are stored in the charge storage film.

5. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C60 fullerenes, the charge storage film being not less than 0.5 monolayer and being less than 1.0 monolayer;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein the semiconductor layer comprises one of polycrystalline silicon, IGZO (InGaZnO), HIZO (HfInZnO), and InMgO.

9. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C70 fullerenes;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein the C70 fullerenes have two molecules short-range order, and do not have long-range order.

10. The device according to claim 9, wherein the charge storage film is not less than 0.5 monolayer and is less than 1.0 monolayer.

12. The device according to claim 9, wherein the charge storage film comprises a matrix component between the C70 fullerenes.

14. The device according to claim 9, wherein the first insulating film comprises one of SiO₂, SiON, HfSiO, and parylene.

15. The device according to claim 9, wherein the second insulating film comprises at least one material selected from the group consisting of SiO₂, SiN, Al₂O₃, MgO, CaF₂, La₂O₃, and HfO₂.

16. The device according to claim 9, wherein the control electrode comprises one of polycrystalline silicon, tantalum (Ta), and a tantalum compound.

11. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C70 fullerenes, the charge storage film being not less than 0.3 monolayer and being not more than 0.5 monolayer;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein dimers of the C70 fullerenes are formed when charges are stored in the charge storage film.

13. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising C70 fullerenes, the charge storage film being not less than 0.3 monolayer and being not more than 0.5 monolayer;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein the semiconductor layer comprises one of polycrystalline silicon, IGZO (InGaZnO) HIZO (HfInZnO), and InMgO.

17. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising molecules or clusters, dimers of the molecules or the clusters being formed when charges are stored in the charge storage film;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film.

18. The device according to claim 17, wherein the clusters are electrically conductive fine particles comprising at least one selected from the group consisting of Ag, Au, Cu, Ru, Pt, W, Ta, Rh, Ir, Os, Pd, Nb, Mo, CuS, CuSe, CuSeTe, AgS, AgSe, CuSe, CuSeTe, GeS, GeSe, GeSeTe, TiO containing oxygen defects, RuO containing oxygen defects, TiN, HfN, Si, Ge, and SiGe.

20. The device according to claim 17, wherein the charge storage film comprises a matrix component between the molecules or the clusters.

21. The device according to claim 17, wherein the molecules or clusters have short-range order, and do not have long-range order.

22. The device according to claim 21, wherein the clusters are electrically conductive fine particles comprising at least one selected from the group consisting of Ag, Au, Cu, Ru, Pt, W, Ta, Rh, Ir, Os, Pd, Nb, Mo, CuS, CuSe, CuSeTe, AgS, AgSe, CuSe, CuSeTe, GeS, GeSe, GeSeTe, TiO containing oxygen defects, RuO containing oxygen defects, TiN, HfN, Si, Ge, and SiGe.

23. The device according to claim 17, wherein the semiconductor layer comprises one of polycrystalline silicon, IGZO (InGaZnO) HIZO (HfInZnO), and InMgO.

19. A nonvolatile semiconductor memory device, comprising:

a semiconductor layer;

a first insulating film formed on the semiconductor layer;

a charge storage film formed on the first insulating film, the charge storage film comprising molecules or clusters, dimers of the molecules or the clusters being formed when charges are stored in the charge storage film;

a second insulating film formed on the charge storage film; and

a control electrode formed on the second insulating film,

wherein the molecules are of carborane acid, bromocarborane acid, orthocarborane, B₁₂N₁₂, (BN)₃₆, B₁₅C₃₀N₁₅, [Pd₂@Ge₁₈]⁴⁻

, or (CdSe)₃₄.