Programmable substrate and applications thereof

• US 8,866,196 B2
• Filed: 08/30/2012
• Issued: 10/21/2014
• Est. Priority Date: 03/22/2012
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Alexopoulos, Nicolaos G.
• Primary Examiner(s): MOORE, WHITNEY
• Application Number:
  US13/600,087
• Publication Number:
  US 20130248936A1
• Time in Patent Office: 782 Days
• Field of Search: 257/202, 257/204, 257/E27.07, 257/E27.111, 257/414, 381/175, 381/176, 381/399, 438/53, 438/652, 336/200, 336/223
• US Class Current: 257/204
• CPC Class Codes: H01Q 1/2283 mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
• CPC Class Codes: H01Q 15/002 said selective devices being reconfigurable or tunable, e.g. using switches or diodes
• CPC Class Codes: H01Q 15/008 said selective devices having Sievenpipers' mushroom elements

Abstract

An integrated circuit die includes a semiconductor substrate and a plurality of electronic circuits on the semiconductor substrate. The semiconductor substrate is divided into a plurality of regions. A first region of the substrate supports a first type of electronic circuit and has first permittivity, permeability, and conductivity characteristics. A second region of the substrate supports a second type of electronic circuit and has second permittivity, permeability, and conductivity characteristics.

Claims

1. An integrated circuit die comprises:

a semiconductor substrate; and

a plurality of electronic circuits on the semiconductor substrate, wherein the semiconductor substrate is divided into a plurality of regions, wherein a first region of the plurality of regions supports a first type of electronic circuit and the semiconductor substrate has first permittivity, permeability, and conductivity characteristics within the first region and wherein a second region of the plurality of regions supports a second type of electronic circuit and the semiconductor substrate has second permittivity, permeability, and conductivity characteristics within the second region, wherein the semiconductor substrate in the first region includes a substrate material that has a perforated silicon pattern such that first region has a high effective permittivity.

2. The integrated circuit die of claim 1, wherein the semiconductor substrate comprises at least one of:

silicon germanium;

porous alumina;

silicon monocrystals; and

gallium arsenide.

3. The integrated circuit die of claim 1 further comprises:

the semiconductor substrate in the first region including a substrate material that has embedded therein a first embedding pattern of at least one of metallic inclusions and dielectric elements to produce the first permittivity, permeability, and conductivity characteristics; and

the semiconductor substrate in the second region including the substrate material that has embedded therein a second embedding pattern of the at least one of metallic inclusions and dielectric elements to produce the second permittivity, permeability, and conductivity characteristics.

4. The integrated circuit die of claim 3 further comprises:

the first embedding pattern indicating a first quantity of the at least one of metallic inclusions and dielectric elements, a first spacing for the at least one of metallic inclusions and dielectric elements, and a first variety of sizes for the at least one of metallic inclusions and dielectric elements; and

the second embedding pattern indicating a second quantity of the at least one of metallic inclusions and dielectric elements, a second spacing for the at least one of metallic inclusions and dielectric elements, and a second variety of sizes for the at least one of metallic inclusions and dielectric elements.

5. The integrated circuit die of claim 1 further comprises:

the semiconductor substrate in the first region including a substrate material that has embedded therein metallodielectric structures such that the first region has a high effective permeability.

6. The integrated circuit die of claim 1, wherein an electronic circuit of the plurality of electronic components comprises at least one of:

a capacitor;

a resistor;

an inductor;

a transistor;

a diode; and

an antenna.

7. A semiconductor substrate comprises:

a plurality of regions, wherein a first region of the plurality of regions has first permittivity, permeability, and conductivity characteristics and wherein a second region of the plurality of regions has second permittivity, permeability, and conductivity characteristics, wherein in the first region, a substrate material that has a perforated silicon pattern such that first region has a high effective permittivity.

8. The semiconductor substrate of claim 7 comprises a material of at least one of:

silicon germanium;

porous alumina;

silicon monocrystals; and

gallium arsenide.

9. The semiconductor substrate of claim 7 further comprises:

in the first region, a substrate material that has embedded therein a first embedding pattern of at least one of metallic inclusions and dielectric elements to produce the first permittivity, permeability, and conductivity characteristics; and

in the second region, the substrate material that has embedded therein a second embedding pattern of the at least one of metallic inclusions and dielectric elements to produce the second permittivity, permeability, and conductivity characteristics.

10. The semiconductor substrate of claim 9 further comprises:

the first embedding pattern indicating a first quantity of the at least one of metallic inclusions and dielectric elements, a first spacing for the at least one of metallic inclusions and dielectric elements, and a first variety of sizes for the at least one of metallic inclusions and dielectric elements; and

the second embedding pattern indicating a second quantity of the at least one of metallic inclusions and dielectric elements, a second spacing for the at least one of metallic inclusions and dielectric elements, and a second variety of sizes for the at least one of metallic inclusions and dielectric elements.

11. The semiconductor substrate of claim 7 further comprises:

in the first region, a substrate material that has embedded therein metallodielectric structures such that the first region has a high effective permeability.

12. The semiconductor substrate of claim 7 further comprises:

a third region of the plurality of regions having third permittivity, permeability, and conductivity characteristics.

13. The semiconductor substrate of claim 7 further comprising a plurality of electronic components including at least one of:

a capacitor;

a resistor;

an inductor;

a transistor;

a diode; and

an antenna.

14. A semiconductor substrate comprises:

a plurality of regions, wherein;

a first region of the plurality of regions has first permittivity, permeability, and conductivity characteristics, formed of a substrate material that has embedded therein a first embedding pattern of at least one of metallic inclusions and dielectric elements to produce the first permittivity, permeability, and conductivity characteristics, the first embedding pattern indicating a first quantity of the at least one of metallic inclusions and dielectric elements, a first spacing for the at least one of metallic inclusions and dielectric elements, and a first variety of sizes for the at least one of metallic inclusions and dielectric elements; and

a second region of the plurality of regions has second permittivity, permeability, and conductivity characteristics, formed of a substrate material that has embedded therein a second embedding pattern of the at least one of metallic inclusions and dielectric elements to produce the second permittivity, permeability, and conductivity characteristics, the second embedding pattern indicating a second quantity of the at least one of metallic inclusions and dielectric elements, a second spacing for the at least one of metallic inclusions and dielectric elements, and a second variety of sizes for the at least one of metallic inclusions and dielectric elements.

15. The semiconductor substrate of claim 14 comprises a material of at least one of:

silicon germanium;

porous alumina;

silicon monocrystals; and

gallium arsenide.

16. The semiconductor substrate of claim 14 further comprises:

in the first region, a substrate material that has embedded therein metallodielectric structures such that the first region has a high effective permeability.

17. The semiconductor substrate of claim 14 further comprises:

in the first region, a substrate material that has a perforated silicon pattern such that first region has a high effective permittivity.

18. The semiconductor substrate of claim 14 further comprises:

a third region of the plurality of regions having third permittivity, permeability, and conductivity characteristics.

19. The semiconductor substrate of claim 14 further comprising a plurality of electronic components formed in the first region and the second region.

20. The semiconductor substrate of claim 19, wherein the plurality of electronic components comprises at least one of:

a capacitor;

a resistor;

an inductor;

a transistor;

a diode; and

an antenna.