Bonding process and bonded structures

• US 8,866,289 B2
• Filed: 01/05/2012
• Issued: 10/21/2014
• Est. Priority Date: 04/30/2009
• Status: Active Grant

• Current Assignee: Silex Microsystems AB (Sai Microelectronics, Inc.)
• Original Assignee: Silex Microsystems AB (Sai Microelectronics, Inc.)
• Inventors: Ebefors, Thorbjorn, Kalvesten, Edward, Svedin, Niklas, Eriksson, Anders
• Primary Examiner(s): Parekh, Nitin
• Application Number:
  US13/344,070
• Publication Number:
  US 20120112335A1
• Time in Patent Office: 1,020 Days
• Field of Search: 438/107, 438/106, 257/684, 257/710, 257/704, 257/728, 257/E23.18
• US Class Current: 257/710
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/29035 covering only the peripheral area of the surface to be connected
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/81193 wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81203 Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• CPC Class Codes: H01L 2224/81895 between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/83805 involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 2224/9211 Parallel connecting processes
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/92 : Specific sequence of method steps
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/1461 : MEMS

Abstract

A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.

Claims

1. A bonding structure, comprising:

a first substrate;

a second substrate formed of a silicon wafer;

an oxide layer on a surface of the second substrate, the oxide layer having a recess extending entirely through the oxide layer to the surface of the second substrate; and

a eutectic bond between the first and the second substrates,

wherein the eutectic bond extends into the second substrate through the recess in the oxide layer on the second substrate,

wherein silicon of the second substrate is a part of the eutectic bond.

2. The bonding structure according to claim 1, wherein the eutectic bond in the recess is a part of a sealing structure for sealing portions of the first and the second substrates together.

3. The bonding structure according to claim 2,

wherein there is provided, on the first substrate, a soft first component of said sealing structure made of a material selected from one of the group consisting of gold (Au), gold-tin (AuSn), and other eutectic compositions, and

wherein, on the second substrate, there is provided a second component made of a material selected from the group consisting of poly-silicon, Au, and AuSn.

4. The bonding structure according to claim 3, wherein the second component is provided so as to extend into said recess.

5. The bonding structure according to claim 3, the second component is provided with a very thin layer of Au in order to prevent oxidation.

6. The bonding structure according to claim 5, wherein the thin layer of Au has a thickness of approximately 100 nm.